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  • 封装:48-TFSOP(0.240",6.10mm 宽)
  • RoHS:库存产品核实请求 / 库存产品核实请求
  • 包装方式:Digi-Reel®
  • 参考价格:$0.62-$1.44

更新日期:2024-04-01 00:04:00

产品简介:具有总线保持、TTL 兼容型 CMOS 输入和三态输出的 16 通道、2.7V 至 3.6V 缓冲器

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  • 封装:48-TFSOP(0.240",6.10mm 宽)
  • RoHS:库存产品核实请求 / 库存产品核实请求
  • 包装方式:Digi-Reel®
  • 参考价格:$0.62-$1.44

SN74LVTH162241DGGR 供应商

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SN74LVTH162241DGGR 中文资料属性参数

  • 标准包装:1
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 缓冲器,驱动器,接收器,收发器
  • 系列:74LVTH
  • 逻辑类型:缓冲器/线路驱动器,非反相
  • 元件数:4
  • 每个元件的位元数:4
  • 输出电流高,低:12mA,12mA
  • 电源电压:2.7 V ~ 3.6 V
  • 工作温度:-40°C ~ 85°C
  • 安装类型:表面贴装
  • 封装/外壳:48-TFSOP(0.240",6.10mm 宽)
  • 供应商设备封装:48-TSSOP
  • 包装:®
  • 其它名称:296-8667-6

产品特性

  • Members of the Texas Instruments Widebus™ Family
  • State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
  • Output Ports Have Equivalent 22- Series Resistors, So No External Resistors Are Required
  • Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
  • Support Unregulated Battery Operation Down to 2.7 V
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
  • Flow-Through Architecture Optimizes PCB Layout
  • Latch-Up Performance Exceeds 500 mA Per JESD 17
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings

产品概述

These 16-bit buffers/drivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.The devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. The devices provide noninverting outputs and complementary output-enable (OE and OE) inputs.The outputs, which are designed to source or sink up to 12 mA, include equivalent 22- series resistors to reduce overshoot and undershoot.When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.The SN54LVTH162241 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LVTH162241 is characterized for operation from -40°C to 85°C.

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