- 封装:56-BSSOP(0.295",7.50mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$11.7-$9.945
更新日期:2024-04-01
产品简介:具有三态输出的 16 位总线收发器和寄存器
查看详情- 封装:56-BSSOP(0.295",7.50mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$11.7-$9.945
74AC16652DL 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
74AC16652DL 中文资料属性参数
- 标准包装:20
- 类别:集成电路 (IC)
- 家庭:逻辑 - 缓冲器,驱动器,接收器,收发器
- 系列:74AC
- 逻辑类型:寄存收发器,非反相
- 元件数:2
- 每个元件的位元数:8
- 输出电流高,低:24mA,24mA
- 电源电压:3 V ~ 5.5 V
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 封装/外壳:56-BSSOP(0.295",7.50mm 宽)
- 供应商设备封装:56-SSOP
- 包装:管件
- 其它名称:296-32800-574AC16652DL-ND
产品特性
- Members of the Texas Instruments Widebus TM Family
- Independent Registers and Enables for A and B Buses
- Multiplexed Real-Time and Stored Data
- Flow-Through Architecture Optimizes PCB Layout
- Distributed VCC and GND Pin Configurations Minimize High-Speed Switching Noise
- EPIC TM (Enhanced-Performance Implanted CMOS) 1-m Process
- 500-mA Typical Latch-Up Immunity at 125°C
- Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings
产品概述
The 'AC16652 are 16-bit bus transceivers that consist of D-type
flip-flops and control circuitry arranged for multiplexed
transmission of data directly from the data bus or from the internal
storage registers. They can be used as two 8-bit transceivers or one
16-bit transceiver.Complementary output-enable (OEAB and ) inputs are provided to control
the transceiver functions. Select-control (SAB and SBA) inputs are
provided to select whether real-time or stored data is transferred. A
low input level selects real-time data, and a high input level
selects stored data. The circuitry used for select control eliminates
the typical decoding glitch that occurs in a multiplexer during the
transition between stored and real-time data. Figure 1 illustrates
the four fundamental bus-management functions that can be performed
with the 'AC16652. Data on the A or B bus, or both, can be stored in the internal D
flip-flops by low-to-high transitions at the appropriate clock (CLKAB
or CLKBA) inputs regardless of the levels on the select-control or
output-enable inputs. When SAB and SBA are in the real-time transfer
mode, it is also possible to store data without using the internal
D-type flip-flops by simultaneously enabling OEAB and . In this configuration, each
output reinforces its input. Thus, when all other data sources to the
two sets of bus lines are at high impedance, each set of bus lines
remains at its last state.The 74AC16652 is packaged in TI's shrink small-outline package
(DL), which provides twice the I/O pin count and functionality of
standard small-outline packages in the same printed-circuit-board
area.The 54AC16652 is characterized for operation over the full
military temperature range of -55°C to 125°C. The 74AC16652
is characterized for operation from -40°C to 85°C. The data-output functions may be enabled or disabled by a
variety of level combinations at OEAB or . Data-input functions are always
enabled; i.e., data at the bus terminals is stored on every
low-to-high transition on the clock inputs.Select control = L; clocks can occur simultaneously.
Select control = H; clocks must be staggered in order to load both
registers.
74AC16652DL 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
![]() |
16-BIT BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS |
10 Pages页,190K | 查看 |
![]() |
Transceiver, Non-Inverting 2 Element 8 Bit per Element Push-Pull Output 56-SSOP |
13页,384K | 查看 |
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