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  • 封装:20-TSSOP(0.173",4.40mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:Digi-Reel®
  • 参考价格:$0.2856-$0.6

更新日期:2024-04-01 00:04:00

产品简介:具有 TTL 兼容型 CMOS 输入和三态输出的 8 通道、2.7V 至 3.6V 缓冲器

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  • 封装:20-TSSOP(0.173",4.40mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:Digi-Reel®
  • 参考价格:$0.2856-$0.6

SN74LVT244BPWR 供应商

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  • 型号
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  • 封装/批号
  • 数量
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SN74LVT244BPWR 中文资料属性参数

  • 标准包装:1
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 缓冲器,驱动器,接收器,收发器
  • 系列:74LVT
  • 逻辑类型:缓冲器/线路驱动器,非反相
  • 元件数:2
  • 每个元件的位元数:4
  • 输出电流高,低:32mA,64mA
  • 电源电压:2.7 V ~ 3.6 V
  • 工作温度:-40°C ~ 85°C
  • 安装类型:表面贴装
  • 封装/外壳:20-TSSOP(0.173",4.40mm 宽)
  • 供应商设备封装:20-TSSOP
  • 包装:®
  • 其它名称:296-8649-6

产品特性

  • Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
  • Supports Unregulated Battery Operation Down to 2.7 V
  • Typical VOLP (Output Ground Bounce)    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

产品概述

This octal buffer and line driver is designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.The SN74LVT244B is organized as two 4-bit line drivers with separate output-enable (OE)\ inputs. When OE\ is low, the device passes data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

SN74LVT244BPWR 数据手册

数据手册 说明 数量 操作
SN74LVT244BPWR

Buffer, Non-Inverting 2 Element 4 Bit per Element Push-Pull Output 20-TSSOP

23页,1.39M 查看

IC 索引: A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 0 1 2 3 4 5 6 7 8 9