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  • 封装:48-TFSOP(0.240",6.10mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:Digi-Reel®
  • 参考价格:$0.651-$1.52

更新日期:2024-04-01 00:04:00

产品简介:具有三态输出的 16 位总线收发器

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  • 封装:48-TFSOP(0.240",6.10mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:Digi-Reel®
  • 参考价格:$0.651-$1.52

SN74LVCR162245DGGR 供应商

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SN74LVCR162245DGGR 中文资料属性参数

  • 标准包装:1
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 缓冲器,驱动器,接收器,收发器
  • 系列:74LVCR
  • 逻辑类型:收发器,非反相
  • 元件数:2
  • 每个元件的位元数:8
  • 输出电流高,低:12mA,12mA
  • 电源电压:2.7 V ~ 3.6 V
  • 工作温度:-40°C ~ 85°C
  • 安装类型:表面贴装
  • 封装/外壳:48-TFSOP(0.240",6.10mm 宽)
  • 供应商设备封装:48-TSSOP
  • 包装:®
  • 其它名称:296-8619-6

产品特性

  • Member of the Texas Instruments Widebus™ Family
  • Operates From 2.7 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 8.5 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce)    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)    >2 V at VCC = 3.3 V, TA = 25°C
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • All Outputs Have Equivalent 26- Series Resistors, So No External Resistors Are Required
  • Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17
  • ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A)
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)

产品概述

This 16-bit (dual-octal) noninverting bus transceiver is designed for 2.7-V to 3.6-V VCC operation.The SN74LVCR162245 is designed forasynchronous communication between data buses. The control-function implementation minimizes external timing requirements.This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so that the buses are effectively isolated.All outputs, which are designed to sink up to 12 mA, include 26- resistors to reduce overshoot and undershoot.Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry is part of the input circuit and is not disabled by OE\ or DIR.To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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