- 封装:7-LSSOP(0.11"?,2.80mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:带卷 (TR)
- 参考价格:$0.202
更新日期:2024-04-01 00:04:00
产品简介:具有施密特触发输入的 3 通道、1.65V 至 5.5V 缓冲器
查看详情- 封装:7-LSSOP(0.11"?,2.80mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:带卷 (TR)
- 参考价格:$0.202
SN74LVC3G17DCTRE4 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI(德州仪器)
-
SM8(SSOP)
2022+ -
12000
-
上海市
-
-
-
原装可开发票
SN74LVC3G17DCTRE4 中文资料属性参数
- 标准包装:3,000
- 类别:集成电路 (IC)
- 家庭:逻辑 - 缓冲器,驱动器,接收器,收发器
- 系列:74LVC
- 逻辑类型:施密特触发器 - 缓冲器,驱动器
- 元件数:3
- 每个元件的位元数:1
- 输出电流高,低:32mA,32mA
- 电源电压:1.65 V ~ 5.5 V
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 封装/外壳:7-LSSOP(0.11"?,2.80mm 宽)
- 供应商设备封装:SM8
- 包装:带卷 (TR)
产品特性
- Available in the Texas Instruments NanoFree™ Package
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Maximum tpd of 5.4 ns at 3.3 V
- Low Power Consumption, 10-µA Maximum ICC
- ±24-mA Output Drive at 3.3 V
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
- Ioff Supports Live Insertion, Partial-Power-Down Mode and Back Drive Protection
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22 2000-V Human Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
- 2000-V Human Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
产品概述
This triple Schmitt-trigger buffer is designed for
1.65-V to 5.5-V VCC operation.The SN74LVC3G17 device contains three buffers and performs the Boolean function Y = A.
The device functions as three independent buffers but, because of Schmitt action, it may have
different input threshold levels for positive-going (VT+) and negative-going
(VT) signals.This device is fully specified for partial-power-down applications using
Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
SN74LVC3G17DCTRE4 电路图

SN74LVC3G17DCTRE4 电路图
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