- 封装:16-TSSOP(0.173",4.40mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:带卷 (TR)
更新日期:2024-04-01 00:04:00
产品简介:IC REGISTR PAR-LOAD 8BIT 16TSSOP
- 封装:16-TSSOP(0.173",4.40mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:带卷 (TR)
SN74LV166APWT 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
SN74LV166APWT 中文资料属性参数
- 标准包装:750
- 类别:集成电路 (IC)
- 家庭:逻辑 - 移位寄存器
- 系列:74LV
- 逻辑类型:移位寄存器
- 输出类型:标准
- 元件数:1
- 每个元件的位元数:8
- 功能:并行或串行至串行
- 电源电压:2 V ~ 5.5 V
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 封装/外壳:16-TSSOP(0.173",4.40mm 宽)
- 供应商设备封装:16-TSSOP
- 包装:带卷 (TR)
SN74LV166APWT 数据手册
| 数据手册 | 说明 | 数量 | 操作 |
|---|---|---|---|
SN74LV166APWT
|
8-BIT PARALLEL-LOAD SHIFT REGISTERS |
15 Pages页,386K | 查看 |
SN74LV166APWTE4
|
The 'LV166A devices are 8-bit parallel-load shift registers, designed for 2-V to 5.5-V VCC operation. The 'LV166A parallel-in or serial-in, serial-out registers feature gated clock (CLK, CLK INH) inputs and an overriding clear (CLR\) input. The parallel-in or serial-in modes are established by the shift/load (SH/LD\) input. When high, SH/LD\ enables the serial (SER) data input and couples the eight flip-flops for serial shifting with each clock (CLK) pulse. When low, the parallel (broadside) data inputs are enabled, and synchronous loading occurs on the next clock pulse. During parallel loadin... |
18页,563K | 查看 |
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SN74LV166APWT