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  • 封装:16-TSSOP(0.173",4.40mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:Digi-Reel®
  • 参考价格:$0.16275-$0.45

更新日期:2024-04-01

产品简介:CMOS 8 级静态移位寄存器

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  • 封装:16-TSSOP(0.173",4.40mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:Digi-Reel®
  • 参考价格:$0.16275-$0.45

CD4021BPWR 供应商

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  • 品牌
  • 封装/批号
  • 数量
  • 地区
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  • 询价

CD4021BPWR 中文资料属性参数

  • 标准包装:1
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 移位寄存器
  • 系列:4000B
  • 逻辑类型:移位寄存器
  • 输出类型:标准
  • 元件数:1
  • 每个元件的位元数:8
  • 功能:并行或串行至串行
  • 电源电压:3 V ~ 18 V
  • 工作温度:-55°C ~ 125°C
  • 安装类型:表面贴装
  • 封装/外壳:16-TSSOP(0.173",4.40mm 宽)
  • 供应商设备封装:16-TSSOP
  • 包装:®
  • 其它名称:296-14256-6

产品特性

  • Medium speed operation…12 MHz (typ.) clock rate at VDD – VSS = 10 V
  • Fully static operation
  • 8 master-slave flip-flops plus output buffering and control gating
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (full package-temperature range) =         1 V at VDD = 5 V         2 V at VDD = 10 V      2.5 V at VDD = 15 V
  • Standardized, symmetrical output characteristics
  • 5-V, 10-V, and 15-V parametric ratings
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
  • Applications: Parallel input/serial output data queueing Parallel to serial data conversion General-purpose register
  • Parallel input/serial output data queueing
  • Parallel to serial data conversion
  • General-purpose register

产品概述

CD4014B and CD4021B series types are 8-stage parallel- or serial-input/serial output registers having common CLOCK and PARALLEL/SERIAL CONTROL inputs, a single SERIAL data input, and individual parallel "JAM" inputs to each register stage. Each register stage is D-type, master-slave flip-flop. In addition to an output form stage 8, "Q" outputs are also available from stages 6 and 7. Parallel as well as serial entry is made into the register synchronously with the positive clock line transition in the CD4014B. In the CD4021B serial entry is synchronous with the clock by parallel entry is asynchronous. In both types, entry is controlled by the PARALLEL/SERIAL CONTROL input. When the PARALLEL/SERIAL CONTROL input is low, data is serially shifted into the 8-stage register synchronously with the positive transition of the clock line. When the PARALLEL/SERIAL CONTROL input is high, data is jammed into the 8-stage register via the parallel input lines and synchronous with the positive transition of the clock line. In the CD4021B, the CLOCK input of the internal stage is "forced" when asynchronous parallel entry is made. Register expansion using multiple packages is permitted.The CD4014B and CD4021B series types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-oultine packages (PW and PWR suffixes).

CD4021BPWR 数据手册

数据手册 说明 数量 操作
CD4021BPWR

CMOS 8-Stage Static Shift Registers

13 Pages页,548K 查看
CD4021BPWRE4

CMOS 8-Stage Static Shift Register 16-TSSOP -55 to 125

16页,726K 查看
CD4021BPWRG4

CMOS 8-Stage Static Shift Register 16-TSSOP -55 to 125

16页,726K 查看

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