- 封装:16-TSSOP(0.173",4.40mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:Digi-Reel®
- 参考价格:$0.1295-$0.47
更新日期:2024-04-01 00:04:00
产品简介:双通道 2 线至 4 线解码器/多路信号分离器
查看详情- 封装:16-TSSOP(0.173",4.40mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:Digi-Reel®
- 参考价格:$0.1295-$0.47
SN74LV139APWR 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI(德州仪器)
-
TSSOP-16
2022+ -
1866
-
上海市
-
-
-
原装可开发票
-
TI
-
TSSOP
23+ -
15000
-
上海市
-
-
-
中国区代理原装现货热卖特价
-
TI
-
TSSOP
23+ -
46000
-
合肥
-
-
-
科大讯飞战略投资企业,提供一站式配套服务
SN74LV139APWR 中文资料属性参数
- 标准包装:1
- 类别:集成电路 (IC)
- 家庭:逻辑 - 信号开关,多路复用器,解码器
- 系列:74LV
- 类型:解码器/多路分解器
- 电路:1 x 2:4
- 独立电路:1
- 输出电流高,低:12mA,12mA
- 电压电源:单电源
- 电源电压:2 V ~ 5.5 V
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 封装/外壳:16-TSSOP(0.173",4.40mm 宽)
- 供应商设备封装:16-TSSOP
- 包装:®
- 其它名称:296-3782-6
产品特性
- 2-V to 5.5-V VCC Operation
- Max tpd of 7.5 ns at 5 V
- Support Mixed-Mode Voltage Operation on All Ports
- Designed Specifically for High-Speed Memory Decoders and Data-Transmission Systems
- Incorporate Two Enable Inputs to Simplify Cascading and/or Data Reception
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
产品概述
The LV139A devices are dual 2-line to 4-line decoders/demultiplexers designed for 2-V to 5.5-V VCC operation.These devices are designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay time of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.The LV139A devices comprise two individual 2-line to 4-line decoders in a single package. The active-low enable (G)\ input can be used as a data line in demultiplexing applications. These decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its driving circuit.These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.
SN74LV139APWR 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
![]() |
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS |
13 Pages页,323K | 查看 |
![]() |
Decoder/Demultiplexer 1 x 2:4 16-TSSOP |
20页,1.05M | 查看 |
![]() |
Dual 2-Line To 4-Line Decoders/Demultiplexers 16-TSSOP -40 to 85 |
19页,817K | 查看 |
![]() |
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS |
13 Pages页,323K | 查看 |
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