- 封装:24-SOIC(0.295",7.50mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$10-$8.2
更新日期:2024-04-01 00:04:00
产品简介:具有奇偶校验发生器/校验器和三态输出的八路收发器
查看详情- 封装:24-SOIC(0.295",7.50mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$10-$8.2
SN74F657DW 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
SN74F657DW 中文资料属性参数
- 标准包装:25
- 类别:集成电路 (IC)
- 家庭:逻辑 - 缓冲器,驱动器,接收器,收发器
- 系列:74F
- 逻辑类型:收发器,非反相
- 元件数:1
- 每个元件的位元数:8
- 输出电流高,低:3mA,24mA; 15mA,64mA
- 电源电压:4.5 V ~ 5.5 V
- 工作温度:0°C ~ 70°C
- 安装类型:表面贴装
- 封装/外壳:24-SOIC(0.295",7.50mm 宽)
- 供应商设备封装:24-SOIC
- 包装:管件
- 其它名称:296-33913-5SN74F657DW-ND
产品特性
- Combines ´F245 and ´F280B Functions in One Package
- High-Impedance N-P-N Inputs for Reduced Loading (70 uA in Low and High States)
- High Output Drive and Light Bus Loading
- 3-State B Outputs Sink 64 mA and Source 15 mA
- Input Diodes for Termination Effects
- Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs
产品概述
The SN74F657 contains eight noninverting buffers with 3-state
outputs and an 8-bit parity generator/checker. It is intended for
bus-oriented applications. The buffers have a specified current
sinking capability of 24 mA at the A port and 64 mA at the B port.
The transmit/receive (T/R\) input determines the direction of the
data flow through the bidirectional transceivers. When T/R\ is high,
data is transmitted from the A port to the B port. When T/R\ is low,
data is received at the A port from the B port.When the output enable ()
input is high, both the A and B ports are placed in a high-impedance
state (disabled). The ODD/EVEN\ input allows the user to select
between odd or even parity systems. When transmitting from A port to
B port (T/R\ high), PARITY is an output from the generator/checker.
When receiving from B port to A port (T/R\ low), PARITY is an input.
When transmitting (T/R\ high), the parity select (ODD/EVEN\) input
is made high or low as appropriate. The A port is then polled to
determine the number of high bits.The PARITY output goes to the logic
state determined by ODD/EVEN\ and the number of high bits on A port.
When ODD/EVEN\ is low (for even parity) and the number of high bits
on A port is odd, the PARITY will be high, transmitting even parity.
If the number of high bits on A port is even, the PARITY will be low,
keeping even parity.When in the receive mode (T/R\ low), the B port is polled to
determine the number of high bits. If ODD/EVEN\ is low (for even
parity) and the number of highs on B port is:The SN74F657 is characterized for operation from 0°C to
70°C.
SN74F657DW 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
![]() |
OCTAL TRANSCEIVER WITH PARITY GENERATOR/CHECKER AND 3-STATE OUTPUTS |
10 Pages页,220K | 查看 |
![]() |
Transceiver, Non-Inverting 1 Element 8 Bit per Element Push-Pull Output 24-SOIC |
11页,244K | 查看 |
![]() |
OCTAL TRANSCEIVER WITH PARITY GENERATOR/CHECKER AND 3-STATE OUTPUTS |
10 Pages页,231K | 查看 |
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