- 封装:6-TSSOP,SC-88,SOT-363
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:Digi-Reel®
- 参考价格:$0.111-$0.4
更新日期:2024-04-01 00:04:00
产品简介:低功耗、1.8/2.5/3.3V 输入、3.3V CMOS 输出、缓冲多路复用器(同向)
查看详情- 封装:6-TSSOP,SC-88,SOT-363
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:Digi-Reel®
- 参考价格:$0.111-$0.4
SN74AUP1T157DCKR 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
SN74AUP1T157DCKR
原装现货 -
TI
-
SC70-6
21+ -
6000
-
深圳
-
12-03
-
QQ询价原装真实库存现货热卖
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI(德州仪器)
-
SC-70-6
2022+ -
3
-
上海市
-
-
-
原装可开发票
-
TI
-
TSSOP
23+ -
46000
-
合肥
-
-
-
科大讯飞战略投资企业,提供一站式配套服务
SN74AUP1T157DCKR 中文资料属性参数
- 标准包装:1
- 类别:集成电路 (IC)
- 家庭:逻辑 - 信号开关,多路复用器,解码器
- 系列:74AUP
- 类型:多路复用器
- 电路:1 x 3:1
- 独立电路:1
- 输出电流高,低:4mA,4mA
- 电压电源:单电源
- 电源电压:2.3 V ~ 3.6 V
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 封装/外壳:6-TSSOP,SC-88,SOT-363
- 供应商设备封装:SC-70-6
- 包装:®
- 其它名称:296-27393-6
产品特性
- Single-Supply Voltage Translator
- Output Level Up to Supply VCC CMOS Level 1.8 V to 3.3 V (at VCC = 3.3 V) 2.5 V to 3.3 V (at VCC = 3.3 V) 1.8 V to 2.5 V (at VCC = 2.5 V) 3.3 V to 2.5 V (at VCC = 2.5 V
- 1.8 V to 3.3 V (at VCC = 3.3 V)
- 2.5 V to 3.3 V (at VCC = 3.3 V)
- 1.8 V to 2.5 V (at VCC = 2.5 V)
- 3.3 V to 2.5 V (at VCC = 2.5 V
- Schmitt-Trigger Inputs Reject Input Noise and Provide Better Output Signal Integrity
- Ioff Supports Partial Power Down (VCC = 0 V)
- Very Low Static Power Consumption: 0.1 µA
- Very Low Dynamic Power Consumption: 0.9 µA
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- Pb-Free Packages Available: SC-70 (DCK) 2 x 2.1 x 0.65 mm (Height 1.1 mm)
- More Gate Options Available at www.ti.com/littlelogic
- ESD Performance Tested Per JESD 22 2000-V Human-Body Model (A114-B, Class II) 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
产品概述
The SN74AUP1T157 is a single 2-input multiplexer that selects data from two data inputs (A and B) under control of a common data select input (C). The state of the common data select input determines the particular register from which the data comes. The output (Y) presents the selected data in the true (non-inverted) form.AUP technology is the industrys lowest-power logic technology designed for use in extending battery-life in operating. All input levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCC supply. This product also maintains excellent signal integrity (see Figure 2 and Figure 3).The wide VCC range of 2.3 V to 3.6 V allows the possibility of switching output level to connect to external controllers or processors.Schmitt-trigger inputs (VT = 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.Ioff is a feature that allows for powered-down conditions (VCC = 0 V) and is important in portable and mobile applications. When VCC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions.The SN74AUP1T157 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.
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