- 封装:56-TFSOP(0.240",6.10mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:Digi-Reel®
- 参考价格:$0.894-$1.91
更新日期:2024-04-01 00:04:00
产品简介:具有三态输出的 16 位寄存收发器
查看详情- 封装:56-TFSOP(0.240",6.10mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:Digi-Reel®
- 参考价格:$0.894-$1.91
SN74ABT16543DGGR 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI/德州仪器
-
TSSOP56
21+ -
10000
-
杭州
-
-
-
只做原装现货,大量现货热卖
-
TI(德州仪器)
-
TSSOP-56
2022+ -
12000
-
上海市
-
-
-
原装可开发票
SN74ABT16543DGGR 中文资料属性参数
- 标准包装:1
- 类别:集成电路 (IC)
- 家庭:逻辑 - 缓冲器,驱动器,接收器,收发器
- 系列:74ABT
- 逻辑类型:寄存收发器,非反相
- 元件数:2
- 每个元件的位元数:8
- 输出电流高,低:32mA,64mA
- 电源电压:4.5 V ~ 5.5 V
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 封装/外壳:56-TFSOP(0.240",6.10mm 宽)
- 供应商设备封装:56-TSSOP
- 包装:®
- 其它名称:296-3911-6
产品特性
- Members of the Texas Instruments WidebusTM Family
- State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
- Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
- Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
- Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
- Flow-Through Architecture Optimizes PCB Layout
- High-Drive Outputs (-32-mA IOH, 64-mA IOL)
- Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings
产品概述
The 'ABT16543 16-bit registered transceivers contain two sets of
D-type latches for temporary storage of data flowing in either
direction. The 'ABT16543 can be used as two 8-bit transceivers or one
16-bit transceiver. Separate latch-enable ( or) and output-enable ( or ) inputs are
provided for each register to permit independent control in either
direction of data flow.The A-to-B enable ()
input must be low to enter data from A or to output data from B. If
is low and is low, the A-to-B latches are
transparent; a subsequent low-to-high transition of puts the A latches in the storage
mode. With and both low, the 3-state B outputs are
active and reflect the data present at the output of the A latches.
Data flow from B to A is similar but requires using the,, and inputs.To ensure the high-impedance state during power up or power down,
should be tied
to VCC through a pullup resistor; the minimum value of the
resistor is determined by the current-sinking capability of the
driver.The SN54ABT16543 is characterized for operation over the full
military temperature range of -55°C to 125°C. The
SN74ABT16543 is characterized for operation from -40°C to
85°C.
SN74ABT16543DGGR 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
![]() |
16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS |
13 Pages页,228K | 查看 |
![]() |
Transceiver, Non-Inverting 2 Element 8 Bit per Element Push-Pull Output 56-TSSOP |
18页,858K | 查看 |
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