- 封装:56-BSSOP(0.295",7.50mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$1.984-$4.48
更新日期:2024-04-01 00:04:00
产品简介:具有 TTL 兼容型 CMOS 输入和三态输出的 20 通道、4.5V 至 5.5V 缓冲器
查看详情- 封装:56-BSSOP(0.295",7.50mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$1.984-$4.48
SN74ABT162827ADL 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI(德州仪器)
-
SSOP-56
2022+ -
12000
-
上海市
-
-
-
原装可开发票
SN74ABT162827ADL 中文资料属性参数
- 标准包装:20
- 类别:集成电路 (IC)
- 家庭:逻辑 - 缓冲器,驱动器,接收器,收发器
- 系列:74ABT
- 逻辑类型:缓冲器/线路驱动器,非反相
- 元件数:2
- 每个元件的位元数:10
- 输出电流高,低:12mA,12mA
- 电源电压:4.5 V ~ 5.5 V
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 封装/外壳:56-BSSOP(0.295",7.50mm 宽)
- 供应商设备封装:56-SSOP
- 包装:管件
- 其它名称:296-3896-5
产品特性
- Members of the Texas Instruments Widebus Family
- Output Ports Have Equivalent 25- Series Resistors, So No External Resistors Are Required
- High-Impedance State During Power Up and Power Down
- Typical VOLP (Output Ground Bounce) < 1 V at VCC= 5 V, TA = 25°C
- Distributed VCC and GND Pin Minimizes High-Speed Switching Noise
- Ioff and Power-Up 3-State Support Hot Insertion
- Flow-Through Architecture Optimizes PCB Layout
- Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
- ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A)
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
产品概述
The ABT162827A devices are noninverting 20-bit buffers composed of two 10-bit buffers with separate output-enable signals. For either 10-bit buffer, the two output-enable (1OE1\ and 1OE2\, or 2OE1\ and 2OE2\) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer are in the high-impedance state.The outputs, which are designed to source or sink up to 12 mA, include equivalent 25- series resistors to reduce overshoot and undershoot.These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.To ensure the high-impedance state during power up or power down, OE\ shall be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
SN74ABT162827ADL 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
![]() |
20-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
11 Pages页,207K | 查看 |
![]() |
Buffer, Non-Inverting 2 Element 10 Bit per Element Push-Pull Output 56-SSOP |
12页,353K | 查看 |
![]() |
20-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
11 Pages页,207K | 查看 |
![]() |
Buffer, Non-Inverting 2 Element 10 Bit per Element Push-Pull Output 56-SSOP |
12页,353K | 查看 |
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