您好,欢迎来到知芯网

DS92LV18TVV/NOPB

Texas Instruments 接口 IC
  • 参考价格:¥105.09-¥95.63

更新日期:2024-04-01 00:04:00

DS92LV18TVV/NOPB

Texas Instruments 接口 IC

产品简介:18 位总线 LVDS 串行器/解串器 - 15-66MHz

查看详情
  • 参考价格:¥105.09-¥95.63

DS92LV18TVV/NOPB 供应商

  • 公司
  • 型号
  • 品牌
  • 封装/批号
  • 数量
  • 地区
  • 日期
  • 说明
  • 询价

DS92LV18TVV/NOPB 中文资料属性参数

  • 制造商:National Semiconductor (TI)
  • 激励器数量:4
  • 接收机数量:4
  • 数据速率:1188 Mbps
  • 工作电源电压:3.3 V
  • 最大工作温度:+ 85 C
  • 封装 / 箱体:LQFP-80
  • 封装:Tray
  • 最小工作温度:- 40 C
  • 安装风格:SMD/SMT
  • 工厂包装数量:119
  • Supply Voltage - Max:3.45 V
  • Supply Voltage - Min:3.15 V
  • 类型:LVCMOS, LVTTL, BLVDS

产品特性

  • 15–66 MHz 18:1/1:18 Serializer/Deserializer (2.376 Gbps Full Duplex Throughput)
  • Independent Transmitter and Receiver Operation with Separate Clock, Enable, and Power Down Pins
  • Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks to Random Data)
  • Wide ±5% Reference Clock Frequency Tolerance for Easy System Design Using Locally-Generated Clocks
  • Line and Local Loopback Modes
  • Robust BLVDS Serial Transmission Across Backplanes and Cables for Low EMI
  • No External Coding Required
  • Internal PLL, No External PLL Components Required
  • Single +3.3V Power Supply
  • Low Power: 90mA (typ) Transmitter, 100mA (typ) at 66 MHz with PRBS-15 Pattern
  • ±100 mV Receiver Input Threshold
  • Loss of Lock Detection and Reporting Pin
  • Industrial −40 to +85°C Temperature Range
  • >2.0kV HBM ESD
  • Compact, Standard 80-Pin LQFP Package

产品概述

The DS92LV18 Serializer/Deserializer (SERDES) pair transparently translates a 18–bit parallel bus into a BLVDS serial stream with embedded clock information. This single serial stream simplifies transferring a 18-bit, or less, bus over PCB traces and cables by eliminating the skew problems between parallel data and clock paths. It saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins.This SERDES pair includes built-in system and device test capability. The line loopback feature enables the user to check the integrity of the serial data transmission paths of the transmitter and receiver while deserializing the serial data to parallel data at the receiver outputs. The local loopback feature enables the user to check the integrity of the transceiver from the local parallel-bus side.The DS92LV18 incorporates modified BLVDS signaling on the high-speed I/O. BLVDS provides a low power and low noise environment for reliably transferring data over a serial transmission path. The equal and opposite currents through the differential data path control EMI by coupling the resulting fringing fields together.

DS92LV18TVV/NOPB 电路图

DS92LV18TVV/NOPB 电路图

DS92LV18TVV/NOPB 电路图

IC 索引: A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 0 1 2 3 4 5 6 7 8 9