CDCS503PW

The CDCS503 is a spread spectrum capable, LVCMOS Input Clock Buffer with selectable frequency multiplication.It shares major functionality with the CDCS502 but utilizes a LVCMOS input stage instead of the crystal input stage of the CDCS502. Also an Output Enable pin has been added to the CDCS503.The device accepts a 3.3V LVCMOS signal at the input.The input signal is processed by a PLL, whose output frequency is either equal to the input frequency or multiplied by the factor of 4.The PLL is also able to spread the clock signal by ±0%, ±0.5%, ±1% or ±2% centered around the output clock frequency with a triangular modulation.By this, the device can generate output frequencies between 8MHz and 108MHz with or without SSC.A separate control pin can be used to enable or disable the output. The CDCS503 operates in 3.3V environment.It is characterized for operation from –40°C to 85°C, and available in an 8-pin TSSOP package.