- 封装:28-SSOP(0.209",5.30mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$2.2016-$4.82
更新日期:2024-04-01 00:04:00
产品简介:具有 I2C 控制接口的 1 线至 10 线时钟驱动器
查看详情- 封装:28-SSOP(0.209",5.30mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$2.2016-$4.82
CDC319DB 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI(德州仪器)
-
SSOP-28
2022+ -
12000
-
上海市
-
-
-
原装可开发票
-
TI
-
标准封装
23+ -
15000
-
上海市
-
-
-
中国区代理原装进口特价
-
TI
-
SSOP-28
23+ -
5800
-
上海市
-
-
-
进口原装现货,杜绝假货。
-
TI
-
TSSOP
23+ -
46000
-
合肥
-
-
-
科大讯飞战略投资企业,提供一站式配套服务
-
TI/德州仪器
-
SSOP28
21+ -
2000
-
杭州
-
-
-
只做原装现货,大量现货热卖
CDC319DB 中文资料属性参数
- 标准包装:50
- 类别:集成电路 (IC)
- 家庭:时钟/计时 - 时钟缓冲器,驱动器
- 系列:-
- 类型:扇出缓冲器(分配),数据
- 电路数:1
- 比率 - 输入:输出:1:10
- 差分 - 输入:输出:无/无
- 输入:LVTTL
- 输出:LVTTL,TTL
- 频率 - 最大:100MHz
- 电源电压:3.135 V ~ 3.465 V
- 工作温度:0°C ~ 70°C
- 安装类型:表面贴装
- 封装/外壳:28-SSOP(0.209",5.30mm 宽)
- 供应商设备封装:28-SSOP
- 包装:管件
- 其它名称:296-17640-5
产品特性
- High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM (Synchronous DRAM) Clock Buffering Applications
- Output Skew, tsk(o), Less Than 250 ps
- Pulse Skew, tsk(p), Less Than 500 ps
- Supports up to Two Unbuffered SDRAM DIMMs (Dual Inline Memory Modules)
- I2C Serial Interface Provides Individual Enable Control for Each Output
- Operates at 3.3 V
- Distributed VCC and Ground Pins Reduce Switching Noise
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015
- Packaged in 28-Pin Shrink Small Outline (DB) Package
产品概述
The CDC319 is a high-performance clock buffer that distributes one input (A) to 10 outputs (Y) with minimum
skew for clock distribution. The CDC319 operates from a 3.3-V power supply, and is characterized for operation
from 0°C to 70°C.
The device provides a standard mode (100K-bits/s) I2C serial interface for device control. The implementation
is as a slave/receiver. The device address is specified in the I2C device address table. Both of the I2C inputs
(SDATA and SCLOCK) provide integrated pullup resistors (typically 140 k) and are 5-V tolerant.
Three 8-bit I2C registers provide individual enable control for each of the outputs. All outputs default to enabled
at powerup. Each output can be placed in a disabled mode with a low-level output when a low-level control bit
is written to the control register. The registers are write only and must be accessed in sequential order (i.e.,
random access of the registers is not supported).
The CDC319 provides 3-state outputs for testing and debugging purposes. The outputs can be placed in a
high-impedance state via the output-enable (OE) input. When OE is high, all outputs are in the operational state.
When OE is low, the outputs are placed in a high-impedance state. OE provides an integrated pullup resistor.
CDC319DB 数据手册
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CDC319DB