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  • 封装:16-DIP(0.300",7.62mm)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:管件
  • 参考价格:$0.47872-$1.31

更新日期:2024-04-01

产品简介:高速 CMOS 逻辑 10 选 1 BCD 至十进制解码器

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  • 封装:16-DIP(0.300",7.62mm)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:管件
  • 参考价格:$0.47872-$1.31

CD74HC42E 供应商

  • 公司
  • 型号
  • 品牌
  • 封装/批号
  • 数量
  • 地区
  • 日期
  • 说明
  • 询价

CD74HC42E 中文资料属性参数

  • 标准包装:25
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 信号开关,多路复用器,解码器
  • 系列:74HC
  • 类型:解码器
  • 电路:1 x 4:10
  • 独立电路:1
  • 输出电流高,低:5.2mA,5.2mA
  • 电压电源:单电源
  • 电源电压:2 V ~ 6 V
  • 工作温度:-55°C ~ 125°C
  • 安装类型:通孔
  • 封装/外壳:16-DIP(0.300",7.62mm)
  • 供应商设备封装:16-PDIP
  • 包装:管件
  • 其它名称:296-33091-5CD74HC42E-ND

产品特性

  • Buffered Inputs and Outputs
  • Typical Propagation Delay: 12ns at VCC = 5V, CL = 15pF, TA = 25°C
  • Fanout (Over Temperature Range) Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
  • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . -55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types 2V to 6V Operation High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • 2V to 6V Operation
  • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types 4.5V to 5.5V Operation Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min) CMOS Input Compatibility, Il 1µA at VOL, VOH
  • 4.5V to 5.5V Operation
  • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
  • CMOS Input Compatibility, Il 1µA at VOL, VOH

产品概述

The ’HC42 and CD74HCT42 BCD-to-Decimal Decoders utilize silicon-gate CMOS technology to achieve operating speeds similar to LSTTL decoders with the low power consumption of standard CMOS integrated circuits. These devices have the capability of driving 10 LSTLL loads and are compatible with the standard LS logic family. One of ten outputs (low on select) is selected in accordance with the BCD input. Non-valid BCD inputs result in none of the outputs being selected (all outputs are high).

CD74HC42E 数据手册

数据手册 说明 数量 操作
CD74HC42E

Decoder 1 x 4:10 16-PDIP

12页,274K 查看
CD74HC42EE4

High Speed CMOS Logic 1-of-10 BCD to Decimal Decoder 16-PDIP -55 to 125

10页,267K 查看

IC 索引: A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 0 1 2 3 4 5 6 7 8 9