搜索
发布采购
- 封装：16-TSSOP（0.173"，4.40mm 宽）
- RoHS：无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式：管件
更新日期：2024-04-01 00:04:00
产品简介：IC SHIFT REG PIN/P-OUT 16-TSSOP
- 封装：16-TSSOP（0.173"，4.40mm 宽）
- RoHS：无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式：管件
CD4035BPW 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI(德州仪器)
-
TSSOP-16
2022+ -
12000
-
上海市
-
-
-
原装可开发票
CD4035BPW 中文资料属性参数
- 标准包装：540
- 类别：集成电路 (IC)
- 家庭：逻辑 - 移位寄存器
- 系列：4000B
- 逻辑类型：移位寄存器
- 输出类型：差分
- 元件数：1
- 每个元件的位元数：4
- 功能：并行或串行至串行
- 电源电压：3 V ~ 18 V
- 工作温度：-55°C ~ 125°C
- 安装类型：表面贴装
- 封装/外壳：16-TSSOP（0.173"，4.40mm 宽）
- 供应商设备封装：16-TSSOP
- 包装：管件
CD4035BPW 数据手册
| 数据手册 | 说明 | 数量 | 操作 |
|---|---|---|---|
 CD4035BPW
|
CD4035B is a four-stage clocked signal serial register with provision for synchronous PARALLEL inputs to each stage and SERIAL inputs to the first stage via JK\ logic. Register stages 2, 3, and 4 are coupled in a serial D flip-flop configuration when the register is in the serial mode (PARALLEL/SERIAL control low). Parallel entry into each register stage is permitted when the PARALLEL/SERIAL control is high. In the parallel or serial mode information is transferred on positive clock transitions. When the TRUE/COMPLEMENT control is high, the true contents of the register are available at the ... |
15页,746K | 查看 |
|
CD4035BPWE4
|
CD4035B is a four-stage clocked signal serial register with provision for synchronous PARALLEL inputs to each stage and SERIAL inputs to the first stage via JK\ logic. Register stages 2, 3, and 4 are coupled in a serial D flip-flop configuration when the register is in the serial mode (PARALLEL/SERIAL control low). Parallel entry into each register stage is permitted when the PARALLEL/SERIAL control is high. In the parallel or serial mode information is transferred on positive clock transitions. When the TRUE/COMPLEMENT control is high, the true contents of the register are available at the ... |
15页,746K | 查看 |
|
CD4035BPWG4
|
CD4035B is a four-stage clocked signal serial register with provision for synchronous PARALLEL inputs to each stage and SERIAL inputs to the first stage via JK\ logic. Register stages 2, 3, and 4 are coupled in a serial D flip-flop configuration when the register is in the serial mode (PARALLEL/SERIAL control low). Parallel entry into each register stage is permitted when the PARALLEL/SERIAL control is high. In the parallel or serial mode information is transferred on positive clock transitions. When the TRUE/COMPLEMENT control is high, the true contents of the register are available at the ... |
15页,746K | 查看 |
|
CD4035BPWR
|
CMOS 4-Stage Parallel In/Parallel Out Shift Register 16-TSSOP -55 to 125 |
15页,746K | 查看 |
|
CD4035BPWR
|
IC SHIFT REG P-IN/P-OUT 16-TSSOP |
16页,901K | 查看 |
|
CD4035BPWRE4
|
CMOS 4-Stage Parallel In/Parallel Out Shift Register 16-TSSOP -55 to 125 |
15页,746K | 查看 |
|
CD4035BPWRG4
|
CMOS 4-Stage Parallel In/Parallel Out Shift Register 16-TSSOP -55 to 125 |
15页,746K | 查看 |
CD4035BPW 相关产品
- 100336QC
- 74AC299SCX
- 74AHC164PW,118
- 74HC164PW,118
- 74HC165D,653
- 74HC4094PW,118
- 74HC595D,118
- 74HC595N,112
- 74HC597D,653
- 74HCT164D,653
- 74HCT165D,652
- 74HCT4015N,112
- 74HCT4094D,112
- 74HCT4094D,118
- 74HCT595N,112
- 74LV164D,118
- 74LV165PW,118
- 74LV595PW,112
- CD4014BE
- CD4014BM96
- CD4014BPWR
- CD4015BE
- CD4015BM96
- CD4015BM96G4
- CD4015BPWR
- CD40194BE
- CD4021BE
- CD4021BM96
- CD4021BM96E4
- CD4021BPWR