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  • 封装:8-VFSOP(0.091",2.30mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:带卷 (TR)
  • 参考价格:$0.271

更新日期:2024-04-01

产品简介:具有可配置电压转换和 3 态输出的汽车类 2 位双电源总线收发器

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  • 封装:8-VFSOP(0.091",2.30mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:带卷 (TR)
  • 参考价格:$0.271

CAVC2T45TDCURQ1 供应商

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CAVC2T45TDCURQ1 中文资料属性参数

  • 标准包装:3,000
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 变换器
  • 系列:74AVC
  • 逻辑功能:变换器,双向,3 态
  • 位数:2
  • 输入类型:逻辑
  • 输出类型:逻辑
  • 数据速率:500Mbps
  • 通道数:2
  • 输出/通道数目:1
  • 差分 - 输入:输出:无/无
  • 传输延迟(最大):2.4ns
  • 电源电压:1.2 V ~ 3.6 V
  • 工作温度:-40°C ~ 125°C
  • 封装/外壳:8-VFSOP(0.091",2.30mm 宽)
  • 供应商设备封装:US8
  • 包装:带卷 (TR)

产品特性

  • Qualified for Automotive Applications
  • Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2-V to 3.6-V Power-Supply Range
  • I/Os Are 4.6-V Tolerant
  • Ioff Supports Partial-Power-Down Mode Operation
  • Max Data Rates 500 Mbps (1.8-V to 3.3-V Translation) 320 Mbps (<1.8-V to 3.3-V Translation) 320 Mbps (Translate to 2.5 V or 1.8 V) 280 Mbps (Translate to 1.5 V) 240 Mbps (Translate to 1.2 V)
  • 500 Mbps (1.8-V to 3.3-V Translation)
  • 320 Mbps (<1.8-V to 3.3-V Translation)
  • 320 Mbps (Translate to 2.5 V or 1.8 V)
  • 280 Mbps (Translate to 1.5 V)
  • 240 Mbps (Translate to 1.2 V)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22 8000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
  • 8000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

产品概述

This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.The SN74AVC2T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.The SN74AVC2T45 is designed so that the DIR input is powered by VCCA.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state.

CAVC2T45TDCURQ1 数据手册

数据手册 说明 数量 操作
CAVC2T45TDCURQ1

Voltage Level Translator Bidirectional 1 Circuit 2 Channel 500Mbps US8

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