更新日期:2024-04-01 00:04:00
产品简介:耐辐射 QMLV、30V 输入、2A 双路输出 1MHz PWM 控制器
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Texas Instruments
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CDIP16
21+ -
8
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上海市
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一级代理原装
5962-8768105VEA 中文资料属性参数
- 现有数量:0现货1,901Factory
- 价格:在售
- 系列:*
- 包装:管件
- 产品状态:在售
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产品特性
- QML-V Qualified, SMD 5962-87681
- 5962P8768105Vxx: Radiation Hardness Assurance (RHA) up to 30-krad(Si) Total Ionizing Dose (TID) Passes Functional and Specified Post-Radiation Parametric Limits at 45 krad at LDR (10 mrad(Si)/s) per 1.5× Over Test as Defined in MIL-STD-883 Test Method 1019.9 Paragraph 3.13.3.b Exhibits Low Dose Rate Sensitivity but Remains Within the Pre-Radiation Electrical Limits at 30-krad Total Dose Level, as Allowed by MIL-STD-883, TM1019
- Radiation Hardness Assurance (RHA) up to 30-krad(Si) Total Ionizing Dose (TID)
- Passes Functional and Specified Post-Radiation Parametric Limits at 45 krad at LDR (10 mrad(Si)/s) per 1.5× Over Test as Defined in MIL-STD-883 Test Method 1019.9 Paragraph 3.13.3.b
- Exhibits Low Dose Rate Sensitivity but Remains Within the Pre-Radiation Electrical Limits at 30-krad Total Dose Level, as Allowed by MIL-STD-883, TM1019
- Compatible With Voltage-Mode or Current-Mode Control Methods
- Practical Operation at Switching Frequencies to 1 MHz
- 50-ns Propagation Delay to Output
- High-Current Dual Totem Pole Outputs (2-A Peak)
- Trimmed Oscillator Discharge Current
- Low 100-µA Start-Up Current
- Pulse-by-Pulse Current Limiting Comparator
- Latched Overcurrent Comparator With Full Cycle Restart
- Qualified Over the Military Temperature Range (–55°C to 125°C)
产品概述
The UC1825A-SP PWM controller is a radiation hardened version of the standard UC1825
family. Performance enhancements have been made to several of the circuit blocks. Error amplifier
gain bandwidth product is 12 MHz, while input offset voltage is 2 mV. Current limit threshold is
assured to a tolerance of 5%. Oscillator discharge current is specified at 10 mA for accurate dead
time control. Frequency accuracy is improved to 6%. Start-up supply current, typically 100 µA, is ideal for offline applications. The output drivers are redesigned to actively sink
current during UVLO at no expense to the start-up current specification. In addition each output is
capable of 2-A peak currents during transitions.Functional improvements have also been implemented in this device family. The UC1825
shutdown comparator is now a high-speed overcurrent comparator with a threshold of 1.2 V. The
overcurrent comparator sets a latch that ensures full discharge of the soft-start capacitor before
allowing a restart. While the fault latch is set, the outputs are in the low state. In the event of
continuous faults, the soft-start capacitor is fully charged before discharge to insure that the
fault frequency does not exceed the designed soft start period. The UC1825 CLOCK pin has become
CLK/LEB. This pin combines the functions of clock output and leading edge blanking adjustment and
has been buffered for easier interfacing.The UC1825A-SP has dual alternating outputs and the same pin configuration of the UC1825.
The UC1825A-SP version parts have UVLO thresholds identical to the original UC1825.
5962-8768105VEA 电路图
5962-8768105VEA 电路图
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