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  • RoHS:
    • 镉(Cd)/镉化合物 0.01%
    • 六价隔(Cr6+)/六价隔化合物 0.10%
    • 铅(Pb)/铅化合物 0.10%
    • 汞(Hg)/汞化合物 0.10%
    • 多溴联苯(PBB)0.10%
    • 多溴联苯醚(PBDE)0.10% - 含十溴二苯醚(Deca-BDE) 0.10%
    说明:Latches Mil Enh 16B D-Type Transp Latch
  • 参考价格:¥13.80-¥14.35

更新日期:2024-04-01 00:04:00

产品简介:具有施密特触发输入的增强型产品 16 通道、4.5V 至 5.5V 反相器

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  • RoHS:
    • 镉(Cd)/镉化合物 0.01%
    • 六价隔(Cr6+)/六价隔化合物 0.10%
    • 铅(Pb)/铅化合物 0.10%
    • 汞(Hg)/汞化合物 0.10%
    • 多溴联苯(PBB)0.10%
    • 多溴联苯醚(PBDE)0.10% - 含十溴二苯醚(Deca-BDE) 0.10%
    说明:Latches Mil Enh 16B D-Type Transp Latch
  • 参考价格:¥13.80-¥14.35

V62/03602-01XE 中文资料属性参数

  • 制造商:Texas Instruments
  • 产品种类:闭锁
  • 电路数量:2
  • 逻辑类型:D-Type Transparent Latch
  • 逻辑系列:ACT
  • 极性:Non-Inverting
  • 输出线路数量:16
  • 高电平输出电流:- 16 mA
  • 低电平输出电流:32 mA
  • 传播延迟时间:9.7 ns at 5 V
  • Supply Voltage - Max:5.5 V
  • Supply Voltage - Min:4.5 V
  • 最大工作温度:+ 125 C
  • 最小工作温度:- 40 C
  • 封装 / 箱体:SSOP-48
  • 封装:Reel
  • 安装风格:SMD/SMT
  • 输入线路数量:16
  • 工厂包装数量:1000

产品特性

  • Controlled Baseline One Assembly/Test Site, One Fabrication Site
  • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –40°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product Change Notification
  • Qualification Pedigree
  • Member of the Texas Instruments Widebus™ Family
  • Inputs Are TTL-Voltage Compatible
  • 3-State Bus Driving True Outputs
  • Full Parallel Access for Loading
  • Distributed VCC and GND Pins Minimize High-Speed Switching Noise

产品概述

The SN74ACT16373Q-EP is a 16-bit D-type transparent latch with 3-state outputs, designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.This device can be used as two 8-bit latches or one 16-bit latch. The Q outputs of the latches follow the data (D) inputs if the latch-enable (LE) input is taken high. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.A buffered output-enable (OE)\ input can be used to place the outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines in a bus-organized system, without need for interface or pullup components.OE\ does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

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