- 封装:SOT-563,SOT-666
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:Digi-Reel®
- 参考价格:$0.148-$0.54
更新日期:2024-04-01 00:04:00
产品简介:可配置多功能门
查看详情- 封装:SOT-563,SOT-666
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:Digi-Reel®
- 参考价格:$0.148-$0.54
SN74LVC1G57DRLR 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI(德州仪器)
-
SOT-563
2022+ -
999
-
上海市
-
-
-
原装可开发票
-
TI
-
SOT563
21+ -
2000
-
上海市
-
-
-
原装现货,品质为先,请来电垂询!
-
TI
-
-
2021+ -
28000
-
苏州
-
-
-
-
23+ -
46000
-
合肥
-
-
-
科大讯飞战略投资企业,提供一站式配套服务
SN74LVC1G57DRLR 中文资料属性参数
- 标准包装:1
- 类别:集成电路 (IC)
- 家庭:逻辑 - 栅极和逆变器 - 多功能,可配置
- 系列:74LVC
- 逻辑类型:可配置多功能
- 电路数:1
- 输入数:3
- 施密特触发器输入:是
- 输出类型:单端
- 输出电流高,低:32mA,32mA
- 电源电压:1.65 V ~ 5.5 V
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 封装/外壳:SOT-563,SOT-666
- 供应商设备封装:6-SOT
- 包装:®
- 其它名称:296-18653-6
产品特性
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V Supports Down Translation to VCC
- Supports Down Translation to VCC
- Max tpd of 6.3 ns at 3.3 V
- Schmitt-Triggered Inputs
- Low Power Consumption, 10-µA Maximum ICC
- ±24-mA Output Drive at 3.3 V
- Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- Available in the Texas Instruments NanoFree™ Package
产品概述
The SN74LVC1G57 device features configurable multiple functions. The output state is
determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,
NOR, XNOR, inverter, and buffer. All inputs can be connected to VCC or
GND.This device functions as an independent gate, but because of Schmitt action, it may have
different input threshold levels for positive-going (VT+) and negative-going
(VT–) signals.This configurable multiple-function gate is designed for 1.65-V to 5.5-V
VCC operation.This device is fully specified for partial-power-down applications using
Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
SN74LVC1G57DRLR 电路图

SN74LVC1G57DRLR 电路图
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