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  • 封装:48-BSSOP(0.295",7.50mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:管件
  • 参考价格:$0.63232-$1.73

更新日期:2024-04-01

产品简介:具有三态输出的 16 位透明 D 类锁存器

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  • 封装:48-BSSOP(0.295",7.50mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:管件
  • 参考价格:$0.63232-$1.73

SN74LVC16373DL 供应商

  • 公司
  • 型号
  • 品牌
  • 封装/批号
  • 数量
  • 地区
  • 日期
  • 说明
  • 询价

SN74LVC16373DL 中文资料属性参数

  • 标准包装:25
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 锁销
  • 系列:74LVC
  • 逻辑类型:D 型透明锁存器
  • 电路:8:8
  • 输出类型:三态
  • 电源电压:1.65 V ~ 3.6 V
  • 独立电路:2
  • 延迟时间 - 传输:2.1ns
  • 输出电流高,低:24mA,24mA
  • 工作温度:-40°C ~ 85°C
  • 安装类型:表面贴装
  • 封装/外壳:48-BSSOP(0.295",7.50mm 宽)
  • 供应商设备封装:48-SSOP
  • 包装:管件
  • 其它名称:296-11834-5

产品特性

  • Member of the Texas Instruments WidebusTM Family
  • EPICTM (Enhanced-Performance Implanted CMOS) Submicron Process
  • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C
  • Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages EPIC and Widebus are trademarks of Texas Instruments Incorporated.

产品概述

This 16-bit transparent D-type latch is designed for 2.7-V to 3.6-V VCC operation. The SN74LVC16373 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. It can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs. A buffered output-enable (OE\) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OE\ does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN74LVC16373 is characterized for operation from -40°C to 85°C.

SN74LVC16373DL 数据手册

数据手册 说明 数量 操作
SN74LVC16373DL

16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

6 Pages页,98K 查看
SN74LVC16373DLR

D-Type Transparent Latch 2 Channel 8:8 IC Tri-State 48-SSOP

12页,480K 查看
SN74LVC16373DLRG4

16-Bit Transparent D-Type Latch With 3-State Outputs 48-SSOP -40 to 85

11页,193K 查看

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