- 封装:56-BSSOP(0.295",7.50mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$10.463-$8.6025
更新日期:2024-04-01
产品简介:具有三态输出的 20 位总线接口 D 类锁存器
查看详情- 封装:56-BSSOP(0.295",7.50mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$10.463-$8.6025
74ACT16841DL 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI(德州仪器)
-
SSOP-56
2022+ -
12000
-
上海市
-
-
-
原装可开发票
74ACT16841DL 中文资料属性参数
- 标准包装:20
- 类别:集成电路 (IC)
- 家庭:逻辑 - 锁销
- 系列:74ACT
- 逻辑类型:D 型透明锁存器
- 电路:10:10
- 输出类型:三态
- 电源电压:4.5 V ~ 5.5 V
- 独立电路:2
- 延迟时间 - 传输:7.7ns
- 输出电流高,低:24mA,24mA
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 封装/外壳:56-BSSOP(0.295",7.50mm 宽)
- 供应商设备封装:56-SSOP
- 包装:管件
- 其它名称:296-4210-5
产品特性
- Members of the Texas Instruments WidebusTM Family
- Inputs Are TTL-Voltage Compatible
- 3-State Outputs Drive Bus Lines Directly
- Provide Extra Bus Driving/Latches Necessary for Wider Address/Data Paths or Buses With Parity
- Flow-Through Architecture Optimizes PCB Layout
- Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
- EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process
- 500-mA Typical Latch-Up Immunity at 125°C
- Package Options Include Plastic Thin Shrink Small-Outline (DGG) Packages, 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings, and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings
产品概述
These 20-bit latches feature 3-state outputs designed specifically
for driving highly capacitive or relatively low-impedance loads. They
are particularly suitable for implementing buffer registers, I/O
ports, bidirectional bus drivers, and working registers.The 'ACT16841 can be used as two 10-bit latches or one 20-bit
latch. The 20 latches are transparent D-type. While the latch-enable
(1LE or 2LE) input is high, the Q outputs of the corresponding 10-bit
latch follow the data (D) inputs. When LE is taken low, the Q outputs
are latched at the levels that were set up at the D inputs.A buffered output-enable (1 or 2) input can be
used to place the outputs of the corresponding 10-bit latch in either
a normal logic state (high or low logic levels) or a high-impedance
state. In the high-impedance state, the outputs neither load nor
drive the bus lines significantly. does not
affect the internal operation of the latches. Old data can be
retained or new data can be entered while the outputs are in the
high-impedance state.The 74ACT16841 is packaged in TI's shrink small-outline package
(DL), which provides twice the I/O pin count and functionality of
standard small-outline packages in the same printed-circuit-board
area.The 54ACT16841 is characterized for operation over the full
military temperature range of -55°C to 125°C. The
74ACT16841 is characterized for operation from -40°C to
85°C.
74ACT16841DL 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
![]() |
D-Type Transparent Latch 2 Channel 10:10 IC Tri-State 56-SSOP |
8页,127K | 查看 |
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