- 封装:48-TFSOP(0.240",6.10mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:Digi-Reel®
- 参考价格:$0.8195-$1.75
更新日期:2024-04-01 00:04:00
产品简介:具有三态输出的 16 位透明 D 型锁存器
查看详情- 封装:48-TFSOP(0.240",6.10mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:Digi-Reel®
- 参考价格:$0.8195-$1.75
SN74ALVCH16373DGGR 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI/德州仪器
-
TSSOP48
21+ -
10000
-
杭州
-
-
-
只做原装现货,大量现货热卖
-
TI
-
SSOP
2019+ -
5800
-
上海市
-
-
-
全新原装现货
-
TI(德州仪器)
-
TSSOP-48
2022+ -
5
-
上海市
-
-
-
原装可开发票
-
TI
-
TSSOP-48
23+ -
5800
-
上海市
-
-
-
进口原装现货,杜绝假货。
SN74ALVCH16373DGGR 中文资料属性参数
- 标准包装:1
- 类别:集成电路 (IC)
- 家庭:逻辑 - 锁销
- 系列:74ALVCH
- 逻辑类型:D 型透明锁存器
- 电路:8:8
- 输出类型:三态
- 电源电压:1.65 V ~ 3.6 V
- 独立电路:2
- 延迟时间 - 传输:1ns
- 输出电流高,低:24mA,24mA
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 封装/外壳:48-TFSOP(0.240",6.10mm 宽)
- 供应商设备封装:48-TSSOP
- 包装:®
- 其它名称:296-5224-6
产品特性
- Member of the Texas Instruments Widebus Family
- Operates From 1.65 V to 3.6 V
- Max tpd of 3.6 ns at 3.3 V
- ±24-mA Output Drive at 3.3 V
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A)
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
产品概述
This 16-bit transparent D-type latch is designed for 1.65-V to 3.6-V VCC operation.The SN74ALVCH16373 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. This device can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OE\ does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
SN74ALVCH16373DGGR 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
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16-Bit Transparent D-Type Latch With 3-State Outputs 48-TSSOP -40 to 85 |
18页,611K | 查看 |
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