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  • 封装:48-BSSOP(0.295",7.50mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:带卷 (TR)
  • 参考价格:$0.943

更新日期:2024-04-01 00:04:00

产品简介:具有三态输出的 16 位边沿 D 类触发器

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  • 封装:48-BSSOP(0.295",7.50mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:带卷 (TR)
  • 参考价格:$0.943

SN74ALVCH162374DLR 供应商

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  • 型号
  • 品牌
  • 封装/批号
  • 数量
  • 地区
  • 日期
  • 说明
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SN74ALVCH162374DLR 中文资料属性参数

  • 标准包装:1,000
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 触发器
  • 系列:74ALVCH
  • 功能:标准
  • 类型:D 型
  • 输出类型:三态非反相
  • 元件数:2
  • 每个元件的位元数:8
  • 频率 - 时钟:150MHz
  • 延迟时间 - 传输:-
  • 触发器类型:正边沿
  • 输出电流高,低:12mA,12mA
  • 电源电压:1.65 V ~ 3.6 V
  • 工作温度:-40°C ~ 85°C
  • 安装类型:表面贴装
  • 封装/外壳:48-BSSOP(0.295",7.50mm 宽)
  • 包装:带卷 (TR)

产品特性

  • Member of the Texas Instruments Widebus™ Family
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Output Ports Have Equivalent 26- Series Resistors, So No External Resistors Are Required
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A)
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)

产品概述

This 16-bit edge-triggered D-type flip-flop is designed for 1.65-V to 3.6-V VCC operation.The SN74ALVCH162374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. It can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.The output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OE\ does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.The outputs, which are designed to sink up to 12 mA, include equivalent 26- resistors to reduce overshoot and undershoot.To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

SN74ALVCH162374DLR 数据手册

数据手册 说明 数量 操作
SN74ALVCH162374DLR

16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs 48-SSOP -40 to 85

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SN74ALVCH162374DLR

IC D-TYPE POS TRG DUAL 48SSOP

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