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  • 封装:*
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:*
  • 参考价格:$0.3465-$0.87

更新日期:2024-04-01 00:04:00

产品简介:具有三态输出的八路 D 类透明锁存器

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  • 封装:*
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:*
  • 参考价格:$0.3465-$0.87

SN74ACT563PWR 供应商

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SN74ACT563PWR 中文资料属性参数

  • 标准包装:1
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 锁销
  • 系列:74ACT
  • 逻辑类型:D 型透明锁存器
  • 电路:8:8
  • 输出类型:三态
  • 电源电压:4.5 V ~ 5.5 V
  • 独立电路:1
  • 延迟时间 - 传输:6.5ns
  • 输出电流高,低:24mA,24mA
  • 工作温度:-40°C ~ 85°C
  • 安装类型:*
  • 封装/外壳:*
  • 供应商设备封装:*
  • 包装:*
  • 其它名称:296-31729-6

产品特性

  • 4.5-V to 5.5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 8.5 ns at 5 V
  • Inputs Are TTL-Voltage Compatible
  • 3-State Inverted Outputs Drive Bus Lines Directly
  • Flow-Through Architecture to Optimize PCB Layout

产品概述

The ’ACT563 devices are octal D-type transparent latches with 3-state outputs. When the latch-enable (LE) input is high, the Q\ outputsare set to the complements of the data (D) inputs. When LE is taken low, the Q\ outputs are latched at the inverse logic levels set up at the D inputs.A buffered output-enable (OE)\ input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased high logic level provide the capability to drive bus lines without interface or pullup components.OE\ does not affect internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

SN74ACT563PWR 数据手册

数据手册 说明 数量 操作
SN74ACT563PWR

D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-TSSOP

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IC 索引: A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 0 1 2 3 4 5 6 7 8 9