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  • 封装:24-SOIC(0.295",7.50mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:带卷 (TR)
  • 参考价格:$0.743

更新日期:2024-04-01 00:04:00

产品简介:具有三态输出的 9 位总线接口 D 类锁存器

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  • 封装:24-SOIC(0.295",7.50mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:带卷 (TR)
  • 参考价格:$0.743

SN74ABT843DWR 供应商

  • 公司
  • 型号
  • 品牌
  • 封装/批号
  • 数量
  • 地区
  • 日期
  • 说明
  • 询价

SN74ABT843DWR 中文资料属性参数

  • 标准包装:2,000
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 锁销
  • 系列:74ABT
  • 逻辑类型:D 型透明锁存器
  • 电路:9:9
  • 输出类型:三态
  • 电源电压:4.5 V ~ 5.5 V
  • 独立电路:1
  • 延迟时间 - 传输:4.4ns
  • 输出电流高,低:32mA,64mA
  • 工作温度:-40°C ~ 85°C
  • 安装类型:表面贴装
  • 封装/外壳:24-SOIC(0.295",7.50mm 宽)
  • 供应商设备封装:24-SOIC
  • 包装:带卷 (TR)

产品特性

  • State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
  • Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
  • High-Drive Outputs (-32-mA IOH, 64-mA IOL)
  • Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages, Ceramic Chip Carriers (FK), Ceramic Flat (W) Package, and Plastic (NT) and Ceramic (JT) DIPs EPIC-IIB is a trademark of Texas Instruments Incorporated.

产品概述

The 'ABT843 9-bit latches are designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The nine transparent D-type latches provide true data at the outputs. A buffered output-enable (OE\) input can be used to place the nine outputs in either a normal logic state (high or low logic levels) or a high-impedance state. The outputs are also in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the device is powered down. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OE\ does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT843 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT843 is characterized for operation from -40°C to 85°C.

SN74ABT843DWR 数据手册

数据手册 说明 数量 操作
SN74ABT843DWR

9-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS

17 Pages页,406K 查看
SN74ABT843DWRE4

9-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS

17 Pages页,369K 查看

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