- 封装:20-SOIC(0.295",7.50mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$0.33792-$0.92
更新日期:2024-04-01
产品简介:具有三态输出的八路边沿 D 类触发器
查看详情- 封装:20-SOIC(0.295",7.50mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$0.33792-$0.92
SN74ABT374ADW 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI(德州仪器)
-
SOIC-20
2022+ -
12000
-
上海市
-
-
-
原装可开发票
-
TI/德州仪器
-
SOP7.2
21+ -
10000
-
杭州
-
-
-
只做原装现货,大量现货热卖
SN74ABT374ADW 中文资料属性参数
- 标准包装:25
- 类别:集成电路 (IC)
- 家庭:逻辑 - 触发器
- 系列:74ABT
- 功能:标准
- 类型:D 型总线
- 输出类型:三态非反相
- 元件数:1
- 每个元件的位元数:8
- 频率 - 时钟:200MHz
- 延迟时间 - 传输:4.2ns
- 触发器类型:正边沿
- 输出电流高,低:32mA,64mA
- 电源电压:4.5 V ~ 5.5 V
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 封装/外壳:20-SOIC(0.295",7.50mm 宽)
- 包装:管件
- 其它名称:296-1044-5
产品特性
- State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
- Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
- Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
- High-Drive Outputs (-32-mA IOH, 64-mA IOL)
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Plastic (N) and Ceramic (J) DIPs, and Ceramic Flat (W) Package
产品概述
These 8-bit flip-flops feature 3-state outputs designed
specifically for driving highly capacitive or relatively
low-impedance loads. They are particularly suitable for implementing
buffer registers, I/O ports, bidirectional bus drivers, and working
registers.The eight flip-flops of the SN54ABT374 and SN74ABT374A are
edge-triggered D-type flip-flops. On the positive transition of the
clock (CLK) input, the Q outputs are set to the logic levels set up
at the data (D) inputs.A buffered output-enable () input can be used to place the eight outputs in either
a normal logic state (high or low logic levels) or a high-impedance
state. In the high-impedance state, the outputs neither load nor
drive the bus lines significantly. The high-impedance state and
increased drive provide the capability to drive bus lines without
need for interface or pullup components. does not affect internal
operations of the flip-flop. Old data can be retained or new data can
be entered while the outputs are in the high-impedance state.To ensure the high-impedance state during power up or power down,
should be tied
to VCC through a pullup resistor; the minimum value of the
resistor is determined by the current-sinking capability of the
driver.The SN54ABT374 is characterized for operation over the full
military temperature range of -55°C to 125°C. The
SN74ABT374A is characterized for operation from -40°C to
85°C.
SN74ABT374ADW 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
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Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs 20-SOIC -40 to 85 |
19页,728K | 查看 |
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IC D-TYPE POS TRG SNGL 20SOIC |
23页,1.34M | 查看 |
![]() |
Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs 20-SOIC -40 to 85 |
19页,728K | 查看 |
![]() |
IC D-TYPE POS TRG SNGL 20SOIC |
23页,1.34M | 查看 |
![]() |
Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs 20-SOIC -40 to 85 |
19页,728K | 查看 |
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