- 封装:20-SOIC(0.295",7.50mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$0.49152-$1.34
更新日期:2024-04-01 00:04:00
产品简介:具有三态输出的 BiCMOS FCT 接口逻辑八路 D 类触发器
查看详情- 封装:20-SOIC(0.295",7.50mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$0.49152-$1.34
CD74FCT374M 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI(德州仪器)
-
SOIC-20
2022+ -
12000
-
上海市
-
-
-
原装可开发票
CD74FCT374M 中文资料属性参数
- 标准包装:25
- 类别:集成电路 (IC)
- 家庭:逻辑 - 触发器
- 系列:74FCT
- 功能:标准
- 类型:D 型总线
- 输出类型:三态非反相
- 元件数:1
- 每个元件的位元数:8
- 频率 - 时钟:70MHz
- 延迟时间 - 传输:6.6ns
- 触发器类型:正边沿
- 输出电流高,低:15mA,48mA
- 电源电压:4.75 V ~ 5.25 V
- 工作温度:0°C ~ 70°C
- 安装类型:表面贴装
- 封装/外壳:20-SOIC(0.295",7.50mm 宽)
- 包装:管件
- 其它名称:296-9416-5
产品特性
- BiCMOS Technology With Low Quiescent Power
- 3-State Outputs Drive Bus Lines Directly
- Buffered Inputs
- Noninverted Outputs
- Input/Output Isolation From VCC
- Controlled Output Edge Rates
- 48-mA Output Sink Current
- Output Voltage Swing Limited to 3.7 V
- SCR Latch-Up-Resistant BiCMOS Process and Circuit Design
- Package Options Include Plastic Small-Outline (M) and Shrink Small-Outline (SM) Packages and Standard Plastic (E) DIP
产品概述
The CD74FCT374 is an octal, edge-triggered, D-type flip-flop that uses a small-geometry BiCMOS technology and features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The output stage is a combination of bipolar and CMOS transistors that limits the output high level to two diode drops below VCC. This resultant lowering of output swing (0 V to 3.7 V) reduces power-bus ringing [a source of electromagnetic interference (EMI)] and minimizes VCC bounce and ground bounce and their effects during simultaneous output switching. The output configuration also enhances switching speed and is capable of sinking 48 mA.
The eight flip-flops enter data into their registers on the low-to-high transition of the clock (CLK). The output-enable (OE\) input controls the 3-state outputs and is independent of the register operation. When OE\ is high, the outputs are in the high-impedance state.
A buffered OE\ input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components.
OE\ does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The CD74FCT374 is characterized for operation from 0°C to 70°C.
CD74FCT374M 数据手册
| 数据手册 | 说明 | 数量 | 操作 |
|---|---|---|---|
CD74FCT374M
|
IC D-TYPE POS TRG SNGL 20SOIC |
12页,503K | 查看 |
CD74FCT374M96
|
BiCMOS FCT Interface Logic Octal D-Type Flip-Flops with 3-State Outputs 20-SOIC 0 to 70 |
12页,449K | 查看 |
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CD74FCT374M