- 封装:48-BSSOP(0.295",7.50mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:带卷 (TR)
- 参考价格:$2.964-$3.458
更新日期:2024-04-01
产品简介:具有三态输出的 16 位 D 级透明锁存器(增强型产品)
查看详情- 封装:48-BSSOP(0.295",7.50mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:带卷 (TR)
- 参考价格:$2.964-$3.458
CABT16373AMDLREP 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI(德州仪器)
-
SSOP-48
2022+ -
12000
-
上海市
-
-
-
原装可开发票
CABT16373AMDLREP 中文资料属性参数
- 标准包装:1,000
- 类别:集成电路 (IC)
- 家庭:逻辑 - 锁销
- 系列:74ABT
- 逻辑类型:D 型透明锁存器
- 电路:8:8
- 输出类型:三态
- 电源电压:4.5 V ~ 5.5 V
- 独立电路:2
- 延迟时间 - 传输:4.1ns
- 输出电流高,低:24mA,48mA
- 工作温度:-55°C ~ 125°C
- 安装类型:表面贴装
- 封装/外壳:48-BSSOP(0.295",7.50mm 宽)
- 供应商设备封装:48-SSOP
- 包装:带卷 (TR)
- 其它名称:296-22091-2V62/06628-01XE
产品特性
- Controlled Baseline One Assembly/Test Site, One Fabrication Site
- One Assembly/Test Site, One Fabrication Site
- Extended Temperature Performance of -55°C to 125°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product Change Notification
- Qualification Pedigree(1)
- Member of the Texas Instruments Widebus Family
- State-of-the-Art EPIC-IIB BiCMOS Design Significantly Reduces Power Dissipation
- Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 5 V, TA = 25°C
- High-Impedance State During Power Up and Power Down
- Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
- Flow-Through Architecture Optimizes PCB Layout
- High-Drive Outputs (-24-mA IOH, 48-mA IOL)
- Plastic 300-mil Shrink Small-Outline (DL) Package
产品概述
The SN74ABT16373A-EP is a 16-bit transparent D-type latch with 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The SN74ABT16373A-EP is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.The SN74ABT16373A-EP can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components.OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.The SN74ABT16373A-EP is characterized for operation from -55°C to 125°C.
CABT16373AMDLREP 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
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D-Type Transparent Latch 2 Channel 8:8 IC Tri-State 48-SSOP |
14页,686K | 查看 |
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