V62/07625-01XE

Texas Instruments 逻辑集成电路

RoHS：
• 镉（Cd）/镉化合物 0.01%
• 六价隔（Cr6+）/六价隔化合物 0.10%
• 铅（Pb）/铅化合物 0.10%
• 汞（Hg）/汞化合物 0.10%
• 多溴联苯(PBB)0.10%
• 多溴联苯醚(PBDE)0.10% - 含十溴二苯醚(Deca-BDE) 0.10%
说明：Inverters Mil Enh Sgl Invtr Gate
参考价格：￥1.59-￥1.86

更新日期：2024-04-01 00:04:00

V62/07625-01XE

Texas Instruments 逻辑集成电路

产品简介：增强型产品单路 1.65V 至 5.5V 反相器

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RoHS：
• 镉（Cd）/镉化合物 0.01%
• 六价隔（Cr6+）/六价隔化合物 0.10%
• 铅（Pb）/铅化合物 0.10%
• 汞（Hg）/汞化合物 0.10%
• 多溴联苯(PBB)0.10%
• 多溴联苯醚(PBDE)0.10% - 含十溴二苯醚(Deca-BDE) 0.10%
说明：Inverters Mil Enh Sgl Invtr Gate
参考价格：￥1.59-￥1.86

V62/07625-01XE 中文资料属性参数

制造商：Texas Instruments
产品种类：变换器
电路数量：1
逻辑系列：LVC
逻辑类型：CMOS
高电平输出电流：- 32 mA
低电平输出电流：32 mA
Supply Voltage - Max：5.5 V
Supply Voltage - Min：1.65 V
最大工作温度：+ 125 C
封装 / 箱体：SOT-23
封装：Reel
安装风格：SMD/SMT
工作电源电压：1.8 V, 2.5 V, 3.3 V, 5 V
工厂包装数量：3000

产品特性

Supports 5-V VCC Operation
Inputs Accept Voltages to 5.5 V
Max tpd of 3.3 ns at 3.3 V
Low Power Consumption, 10-µA Max ICC
±24-mA Output Drive at 3.3 V
Ioff Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS Controlled Baseline One Assembly/Test Site One Fabrication Site Available in Military (–55°C/125°C) Temperature Range(1) Extended Product Life Cycle Extended Product-Change Notification Product Traceability
Controlled Baseline
One Assembly/Test Site
One Fabrication Site
Available in Military (–55°C/125°C) Temperature Range(1)
Extended Product Life Cycle
Extended Product-Change Notification
Product Traceability

产品概述

This single inverter gate is designed for 1.65-V to 5.5-V VCC operation.The SN74LVC1G04 performs the Boolean function Y = A.NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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