- RoHS:
镉(Cd)/镉化合物 0.01%
六价隔(Cr6+)/六价隔化合物 0.10%
铅(Pb)/铅化合物 0.10%
汞(Hg)/汞化合物 0.10%
多溴联苯(PBB)0.10%
多溴联苯醚(PBDE)0.10% - 含十溴二苯醚(Deca-BDE) 0.10%
说明:Gates (AND / NAND / OR / NOR) Mil Enh Sgl 2-Inp Exc-OR Gate - 参考价格:¥3.19-¥3.70
更新日期:2024-04-01 00:04:00
产品简介:增强型产品单路 2 输入 1.65V 至 5.5V XOR(异或)门
查看详情- RoHS:
镉(Cd)/镉化合物 0.01%
六价隔(Cr6+)/六价隔化合物 0.10%
铅(Pb)/铅化合物 0.10%
汞(Hg)/汞化合物 0.10%
多溴联苯(PBB)0.10%
多溴联苯醚(PBDE)0.10% - 含十溴二苯醚(Deca-BDE) 0.10%
说明:Gates (AND / NAND / OR / NOR) Mil Enh Sgl 2-Inp Exc-OR Gate - 参考价格:¥3.19-¥3.70
V62/06666-01XE 中文资料属性参数
- 制造商:Texas Instruments
- 产品种类:门(与/非与/或/非或)
- 产品:XOR
- 逻辑系列:LVC
- 栅极数量:Single
- 线路数量(输入/输出):2 / 1
- 高电平输出电流:- 32 mA
- 低电平输出电流:32 mA
- 传播延迟时间:6.7 ns, 5.7 ns
- Supply Voltage - Max:5.5 V
- Supply Voltage - Min:1.65 V
- 最大工作温度:+ 125 C
- 安装风格:SMD/SMT
- 封装 / 箱体:SOP-5
- 封装:Reel
- 最小工作温度:- 55 C
- 输入线路数量:2
- 输出线路数量:1
- 工厂包装数量:3000
产品特性
- Controlled Baseline One Assembly/Test Site, One Fabrication Site
- One Assembly/Test Site, One Fabrication Site
- Extended Temperature Performance of 55°C to 125°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree(1)
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Max tpd of 6.7 ns at 3.3 V
- Low Power Consumption, 15-µA Max ICC
- ±24-mA Output Drive at 3.3 V
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
产品概述
This single 2-input exclusive-OR gate is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC1G86 performs the Boolean function Y = A B or Y = AB + AB in positive logic.A common application is as a true/complement element. If the input is low, the other input is reproduced in true form at the output. If the input is high, the signal on the other input is reproduced inverted at the output.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.An exclusive-OR gate has many applications, some of which can be represented better by alternative logic symbols.
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