- 参考价格:¥12.63-¥13.94
更新日期:2024-04-01
V62/06662-01XE 中文资料属性参数
- 制造商:Texas Instruments
- 产品种类:计数器 IC
- 计数器类型:Binary Counters
- 逻辑系列:LV-A
- 位数:16
- 计数法:Asynchronous
- 计数顺序:Up/Down
- 工作电源电压:2 V to 5.5 V
- 工作温度范围:- 55 C to + 125 C
- 封装 / 箱体:TSSOP-20
- 封装:Reel
- 安装风格:SMD/SMT
- 工厂包装数量:2000
产品特性
- Controlled Baseline One Assembly Site One Test Site One Fabrication Site
- One Assembly Site
- One Test Site
- One Fabrication Site
- Extended Temperature Performance of -55°C to 125°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree(1)
- Can Be Used as Two 16 Bit Counters or a Single 32 Bit Counter
- 2-V to 5.5-V VCC Operation
- Max tpd of 25 ns at 5 V (RCLK to Y)
- Typical VOLP (Output Ground Bounce) <0.7 V at VCC = 5 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) >4.4 V at VCC = 5 V, TA = 25°C
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
产品概述
The SN74LV8154 is a dual 16 bit binary counter with 3-state output registers, designed for 2-V to 5.5-V VCC operation.This 16 bit counter (A or B) feeds a 16 bit storage register and each storage register is further divided into an upper byte and lower byte. The GAL, GAU, GBL, and GBU inputs are used to select the byte that needs to be output at Y0-Y7. CLKA is the clock for A counter and CLKB is the clock for B counter. RCLK is the clock for the A and B storage registers. All three clock signals are positive-edge triggered.A 32 bit counter can be realized by connecting CLKA and CLKB together and by connecting RCOA to CLKBEN.To ensure the high-impedance state during power up or power down, GAL, GAU, GBL, and GBU should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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