V62/04739-01YE

Texas Instruments 逻辑集成电路

RoHS：
• 镉（Cd）/镉化合物 0.01%
• 六价隔（Cr6+）/六价隔化合物 0.10%
• 铅（Pb）/铅化合物 0.10%
• 汞（Hg）/汞化合物 0.10%
• 多溴联苯(PBB)0.10%
• 多溴联苯醚(PBDE)0.10% - 含十溴二苯醚(Deca-BDE) 0.10%
说明：Flip Flops Mil Enh Hi Spd Pos Edge-Trgrd D-Type
参考价格：￥5.11-￥5.80

更新日期：2024-04-01

V62/04739-01YE

Texas Instruments 逻辑集成电路

产品简介：具有三态输出的高速 Cmos 逻辑八路正边沿触发式 D 型触发器（增强型产品）

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RoHS：
• 镉（Cd）/镉化合物 0.01%
• 六价隔（Cr6+）/六价隔化合物 0.10%
• 铅（Pb）/铅化合物 0.10%
• 汞（Hg）/汞化合物 0.10%
• 多溴联苯(PBB)0.10%
• 多溴联苯醚(PBDE)0.10% - 含十溴二苯醚(Deca-BDE) 0.10%
说明：Flip Flops Mil Enh Hi Spd Pos Edge-Trgrd D-Type
参考价格：￥5.11-￥5.80

V62/04739-01YE 中文资料属性参数

制造商：Texas Instruments
产品种类：触发器
电路数量：1
逻辑系列：HCT
逻辑类型：D-Type (3-State) Flip-Flop
极性：Non-Inverting
输入类型：Single-Ended
输出类型：Single-Ended
传播延迟时间：33 ns
高电平输出电流：- 6 mA
低电平输出电流：6 mA
Supply Voltage - Max：5.5 V
最大工作温度：+ 125 C
安装风格：SMD/SMT
封装 / 箱体：TSSOP-20
封装：Reel
最小工作温度：- 40 C
输入线路数量：8
输出线路数量：8
工厂包装数量：2000
Supply Voltage - Min：4.5 V

产品特性

Controlled Baseline One Assembly/Test Site, One Fabrication Site
One Assembly/Test Site, One Fabrication Site
Extended Temperature Performance of –40°C to 125°C
Enhanced Diminishing Manufacturing Sources (DMS) Support
Enhanced Product Change Notification
Qualification Pedigree
Buffered Inputs
Common 3-State Output-Enable Control
3-State Outputs
Bus-Line Driving Capability
Typical Propagation Delay (Clock to Q): 15 ns at VCC = 5 V, CL = 15 pF, TA = 25°C
Fanout (Over Temperature Range) Standard Outputs . . . 10 LSTTL Loads Bus Driver Outputs . . . 15 LSTTL Loads
Standard Outputs . . . 10 LSTTL Loads
Bus Driver Outputs . . . 15 LSTTL Loads
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
VCC Voltage = 4.5 V to 5.5 V
Direct LSTTL Input Logic Compatibility, VIL = 0.8 V (Max), VIH = 2 V (Min)
CMOS Input Compatibility, Il ≤ 1 µA at VOL, VOH

产品概述

The CD74HCT574 is an octal D-type flip-flop with 3-state outputs and the capability to drive 15 LSTTL loads. The eight edge-triggered flip-flops enter data into their registers on the low-to-high transition of the clock (CP). The output enable (OE)\ controls the 3-state outputs and is independent of the register operation. When OE\ is high, the outputs are in the high-impedance state.

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