- 参考价格:¥1.17-¥3.59
更新日期:2024-04-01
产品简介:具有三态输出的单通道 1.65V 至 5.5V 缓冲器(增强型产品)
查看详情- 参考价格:¥1.17-¥3.59
V62/04735-01XE 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
Texas Instruments
-
SOT-SC70-5
21+ -
604
-
上海市
-
-
-
一级代理原装
V62/04735-01XE 中文资料属性参数
- 制造商:Texas Instruments
- 产品种类:缓冲器和线路驱动器
- 输入线路数量:1
- 输出线路数量:1
- 极性:Non-Inverting
- Supply Voltage - Max:5.5 V
- Supply Voltage - Min:1.65 V
- 最大工作温度:+ 85 C
- 安装风格:SMD/SMT
- 封装 / 箱体:SOT-5
- 封装:Reel
- 高电平输出电流:- 32 mA
- 逻辑系列:LVC
- 逻辑类型:CMOS
- 低电平输出电流:32 mA
- 最小工作温度:- 40 C
- 每芯片的通道数量:1
- 输出类型:3-State
- 传播延迟时间:4.5 ns at 3.3 V
- 工厂包装数量:3000
产品特性
- Controlled BaselineOne Assembly/Test Site, One Fabrication Site
- One Assembly/Test Site, One Fabrication Site
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Max tpd of 3.7 ns at 3.3 V
- Low Power Consumption, 10-µA Max ICC
- ±24-mA Output Drive at 3.3 V
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
产品概述
This bus buffer gate is designed for 1.65-V to 5.5-V VCC operation.The SN74LVC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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