V62/04712-01YE

Texas Instruments 逻辑集成电路

RoHS：
• 镉（Cd）/镉化合物 0.01%
• 六价隔（Cr6+）/六价隔化合物 0.10%
• 铅（Pb）/铅化合物 0.10%
• 汞（Hg）/汞化合物 0.10%
• 多溴联苯(PBB)0.10%
• 多溴联苯醚(PBDE)0.10% - 含十溴二苯醚(Deca-BDE) 0.10%
说明：Latches Mil Enh 3.3V ABT 16B Transp D-Type
参考价格：￥10.35-￥8.69

更新日期：2024-04-01 00:04:00

V62/04712-01YE

Texas Instruments 逻辑集成电路

产品简介：增强型产品，具有三态输出的 3.3V Abt 16 位透明 D 类锁存器

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RoHS：
• 镉（Cd）/镉化合物 0.01%
• 六价隔（Cr6+）/六价隔化合物 0.10%
• 铅（Pb）/铅化合物 0.10%
• 汞（Hg）/汞化合物 0.10%
• 多溴联苯(PBB)0.10%
• 多溴联苯醚(PBDE)0.10% - 含十溴二苯醚(Deca-BDE) 0.10%
说明：Latches Mil Enh 3.3V ABT 16B Transp D-Type
参考价格：￥10.35-￥8.69

V62/04712-01YE 中文资料属性参数

制造商：Texas Instruments
产品种类：闭锁
电路数量：2
逻辑类型：D-Type Latch
逻辑系列：LVT
极性：Non-Inverting
输出线路数量：16
高电平输出电流：- 32 mA
低电平输出电流：32 mA
传播延迟时间：2.7 ns at 3.3 V
Supply Voltage - Max：3.6 V
Supply Voltage - Min：2.7 V
最大工作温度：+ 85 C
最小工作温度：- 40 C
封装 / 箱体：SSOP-48
封装：Reel
安装风格：SMD/SMT
输入线路数量：16
工厂包装数量：1000

产品特性

Controlled Baseline One Assembly/Test Site, One Fabrication Site
One Assembly/Test Site, One Fabrication Site
Enhanced Diminishing Manufacturing Sources (DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree(1)
Member of the Texas Instruments Widebus™ Family
State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static- Power Dissipation
Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
Supports Unregulated Battery Operation Down to 2.7 V
Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
Ioff and Power-Up Tri-State Support Hot Insertion
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Distributed VCC and GND Pins Minimize High- Speed Switching Noise
Flow-Through Architecture Optimizes PCB Layout
Latch-Up Performance Exceeds 500 mA Per JESD 17
ESD Protection Exceeds JESD 22 4000-V Human Body Model (A114-A) 200-V Machine Model (A115-A)
4000-V Human Body Model (A114-A)
200-V Machine Model (A115-A)

产品概述

The SN74LVTH16373 is a 16-bit transparent D-type latch with tri-state outputs designed for low-voltage (3.3 V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.This device is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. This device can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.

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V62/04712-01YE 电路图

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