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  • 参考价格:¥10.35-¥12.83

更新日期:2024-04-01 00:04:00

产品简介:具有三态输出的增强型产品 3.3V Abt 16 位总线收发器

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  • 参考价格:¥10.35-¥12.83

V62/04602-01XE 中文资料属性参数

  • 制造商:Texas Instruments
  • 产品种类:总线收发器
  • 逻辑类型:Standard Transceiver
  • 逻辑系列:LVT
  • 每芯片的通道数量:16
  • 输入电平:TTL/CMOS
  • 输出电平:LVTTL
  • 输出类型:3-State
  • 高电平输出电流:- 24 mA
  • 低电平输出电流:24 mA
  • 传播延迟时间:4.5 ns
  • Supply Voltage - Max:3.6 V
  • Supply Voltage - Min:2.7 V
  • 最大工作温度:+ 125 C
  • 封装 / 箱体:SSOP-48
  • 封装:Reel
  • 功能:Bus Transceiver
  • 最小工作温度:- 40 C
  • 安装风格:SMD/SMT
  • 电路数量:2
  • 极性:Non-Inverting
  • 工厂包装数量:1000

产品特性

  • Controlled BaselineOne AssemblyOne Test SiteOne Fabrication Site
  • One Assembly
  • One Test Site
  • One Fabrication Site
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Member of the Texas Instruments Widebus™ Family
  • State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
  • Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
  • Supports Unregulated Battery Operation Down to 2.7 V
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Distributed VCC and GND Pins Minimize High-Speed Switching Noise
  • Flow-Through Architecture Optimizes PCB Layout
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 500 mA Per JESD 17
  • ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)

产品概述

The SN74LVTH16245A is a 16-bit (dual-octal) noninverting 3-state transceiver designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the devices so that the buses effectively are isolated.Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.When VCC is between 0 V and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

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