- 封装:20-TSSOP(0.173",4.40mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:带卷 (TR)
- 参考价格:$3.887
更新日期:2024-04-01 00:04:00
产品简介:具有串行输入、可编程稳定时间/功耗、低功耗和电源关闭功能的 8 位、8 通道、1/3us DAC
查看详情- 封装:20-TSSOP(0.173",4.40mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:带卷 (TR)
- 参考价格:$3.887
TLV5629IPWR 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI/德州仪器
-
21+
TSSOP20 -
10000
-
杭州
-
-
-
只做原装现货,大量现货热卖
-
TI
-
TSSOP
23+ -
46000
-
合肥
-
-
-
科大讯飞战略投资企业,提供一站式配套服务
TLV5629IPWR 中文资料属性参数
- 产品培训模块:Data Converter Basics
- 标准包装:2,000
- 类别:集成电路 (IC)
- 家庭:数据采集 - 数模转换器
- 系列:-
- 设置时间:3µs
- 位数:8
- 数据接口:串行
- 转换器数目:8
- 电压电源:模拟和数字
- 功率耗散(最大):18mW
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 封装/外壳:20-TSSOP(0.173",4.40mm 宽)
- 供应商设备封装:20-TSSOP
- 包装:带卷 (TR)
- 输出数目和类型:8 电压,单极
- 采样率(每秒):283k
产品特性
- Eight Voltage Output DACs in One Package TLV5610 . . . 12-BitTLV5608 . . . 10-BitTLV5629 . . . 8-Bit
- TLV5610 . . . 12-Bit
- TLV5608 . . . 10-Bit
- TLV5629 . . . 8-Bit
- Programmable Settling Time vs Power Consumption 1 µs In Fast Mode3 µs In Slow Mode
- 1 µs In Fast Mode
- 3 µs In Slow Mode
- Compatible With TMS320 and SPI Serial Ports
- Monotonic Over Temperature
- Low Power Consumption: 18 mW In Slow Mode at 3-V48 mW In Fast Mode at 3-V
- 18 mW In Slow Mode at 3-V
- 48 mW In Fast Mode at 3-V
- Reference Input Buffers
- Power-Down Mode
- Buffered, High Impedance Reference Inputs
- Data Output for Daisy-Chaining
- APPLICATIONSDigital Servo Control LoopsDigital Offset and Gain AdjustmentIndustrial Process ControlMachine and Motion Control DevicesMass Storage Devices
- Digital Servo Control Loops
- Digital Offset and Gain Adjustment
- Industrial Process Control
- Machine and Motion Control Devices
- Mass Storage Devices
产品概述
The TLV5610, TLV5608, and TLV5629 are pin-compatible,
eight-channel, 12-/10-/8-bit voltage output DACs each with a flexible serial
interface. The serial interface allows glueless interface to TMS320 and SPI,
QSPI, and Microwire serial ports. It is programmed with a 16-bit serial string
containing 4 control and 12 data bits.Additional features are a power-down mode, an LDAC input for
simultaneous update of all eight DAC outputs, and a data output which can be
used to cascade multiple devices.The resistor string output voltage is buffered by a
rail-to-rail output amplifier with a programmable settling time to allow the
designer to optimize speed vs power dissipation. The buffered, high-impedance
reference input can be connected to the supply voltage.Implemented with a CMOS process, the DACs are designed for
single-supply operation from 2.7 V to 5.5 V, and can operate on two separate analog and digital power supplies. The devices are available in
20-pin SOIC and TSSOP packages.
TLV5629IPWR 电路图

TLV5629IPWR 电路图
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