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  • 封装:16-UFBGA,DSBGA
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:Digi-Reel®
  • 参考价格:$3.587-$4.9

更新日期:2024-04-01 00:04:00

产品简介:92dB SNR 低功耗立体声 ADC (ADC3001)

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  • 封装:16-UFBGA,DSBGA
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:Digi-Reel®
  • 参考价格:$3.587-$4.9

TLV320ADC3001IYZHT 供应商

  • 公司
  • 型号
  • 品牌
  • 封装/批号
  • 数量
  • 地区
  • 日期
  • 说明
  • 询价

TLV320ADC3001IYZHT 中文资料属性参数

  • 标准包装:1
  • 类别:集成电路 (IC)
  • 家庭:数据采集 - ADCs/DAC - 专用型
  • 系列:NanoFree™
  • 类型:立体声模数转换器
  • 分辨率(位):24 b
  • 采样率(每秒):8k ~ 96k
  • 数据接口:I²C,串行
  • 电压电源:模拟和数字
  • 电源电压:1.8V, 3.3V
  • 工作温度:-40°C ~ 85°C
  • 安装类型:表面贴装
  • 封装/外壳:16-UFBGA,DSBGA
  • 供应商设备封装:16-DSBGA(2x2)
  • 包装:®
  • 其它名称:296-32389-6

产品特性

  • Stereo Audio ADC 92-dBA Signal-to-Noise Ratio Supports ADC Sample Rates From 8 kHz to 96 kHz
  • 92-dBA Signal-to-Noise Ratio
  • Supports ADC Sample Rates From 8 kHz to 96 kHz
  • Instruction-Programmable Embedded miniDSP
  • Flexible Digital Filtering With RAM Programmable Coefficient, Instructions, and Built-In Standard Modes Low-Latency IIR Filters for Voice Linear Phase FIR Filters for Audio Additional Programmable IIR Filters for EQ, Noise Cancellation, or Reduction Up to 128 Programmable ADC Digital Filter Coefficients
  • Low-Latency IIR Filters for Voice
  • Linear Phase FIR Filters for Audio
  • Additional Programmable IIR Filters for EQ, Noise Cancellation, or Reduction
  • Up to 128 Programmable ADC Digital Filter Coefficients
  • Three Audio Inputs With Configurable Automatic Gain Control (AGC) Programmable in Single-Ended or Fully Differential Configurations Can Be Driven Hi-Z for Easy Interoperability With Other Audio ICs
  • Programmable in Single-Ended or Fully Differential Configurations
  • Can Be Driven Hi-Z for Easy Interoperability With Other Audio ICs
  • Low Power Consumption and Extensive Modular Power Control: 6-mW Mono Record 8-kHz 11-mW Stereo Record, 8-kHz 10-mW Mono Record, 48-kHz 17-mW Stereo Record, 48-kHz
  • 6-mW Mono Record 8-kHz
  • 11-mW Stereo Record, 8-kHz
  • 10-mW Mono Record, 48-kHz
  • 17-mW Stereo Record, 48-kHz
  • Programmable Microphone Bias
  • Programmable PLL for Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S, Left/Right- Justified, DSP, PCM, and TDM Modes
  • Power Supplies: Analog: 2.6 V–3.6 V. Digital: Core: 1.65 V–1.95 V, I/O: 1.1 V–3.6 V
  • Analog: 2.6 V–3.6 V.
  • Digital: Core: 1.65 V–1.95 V, I/O: 1.1 V–3.6 V
  • 2.24-mm × 2.16-mm NanoFree™ 16-Ball 16-YZH Wafer Chip Scale Package (WCSP)
  • APPLICATIONS Wireless Handsets Portable Low-Power Audio Systems Noise Cancellation Systems Front-End Voice or Audio Processor for Digital Audio
  • Wireless Handsets
  • Portable Low-Power Audio Systems
  • Noise Cancellation Systems
  • Front-End Voice or Audio Processor for Digital Audio

产品概述

The TLV320ADC3001 device is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via I2C, enabling mono or stereo recording. Low power consumption makes the TLV320ADC3001 ideal for battery-powered portable equipment. The AGC programs to a wide range of attack (7 ms–1.4 s) and decay (50 ms–22.4 s) times. A programmable noise gate function is included to avoid noise pumping. Low-latency IIR filters optimized for voice and telephony are available, as well as linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, DSP, PCM, and TDM modes. The audio bus may be operated in either master or slave mode. A programmable integrated PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

TLV320ADC3001IYZHT 数据手册

数据手册 说明 数量 操作
TLV320ADC3001IYZHT

ADC, Audio 24 bit 96k DSP, I2S 16-DSBGA (2x2)

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TLV320ADC3001IYZHT 电路图

TLV320ADC3001IYZHT 电路图

TLV320ADC3001IYZHT 电路图

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