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  • 封装:16-SOIC(0.154",3.90mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:管件
  • 参考价格:$10.013-$8.2325

更新日期:2024-04-01

产品简介:低功耗 ADSL 和 PLC 线路驱动器

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  • 封装:16-SOIC(0.154",3.90mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:管件
  • 参考价格:$10.013-$8.2325

THS6182D 供应商

  • 公司
  • 型号
  • 品牌
  • 封装/批号
  • 数量
  • 地区
  • 日期
  • 说明
  • 询价

THS6182D 中文资料属性参数

  • 标准包装:40
  • 类别:集成电路 (IC)
  • 家庭:接口 - 驱动器,接收器,收发器
  • 系列:-
  • 类型:线路驱动器,发射器
  • 驱动器/接收器数:1/0
  • 规程:DSL
  • 电源电压:5 V ~ 15 V
  • 安装类型:表面贴装
  • 封装/外壳:16-SOIC(0.154",3.90mm 宽)
  • 供应商设备封装:16-SOIC N
  • 包装:管件
  • 配用:296-18857-ND - EVAL MODULE FOR THS6182RHF296-18856-ND - EVAL MODULE FOR THS6182DW
  • 其它名称:296-14977-5

产品特性

  • Low-Power Dissipation Increases ADSL Line Card Density
  • Low THD of -88 dBc (100 , 1 MHz)
  • Low MTPR Driving +20 dBm on the Line -76 dBc With High Bias Setting -74 dBc With Low Bias Setting
  • -76 dBc With High Bias Setting
  • -74 dBc With Low Bias Setting
  • Wide Output Swing of 44 VPP Differential Into a 200- Differential Load (VCC = ±12 V)
  • High Output Current of 600 mA (Typ)
  • Wide Supply Voltage Range of ±5 V to ±15 V
  • Pin Compatible with EL1503C and EL1508C Multiple Package Options
  • Multiple Package Options
  • Multiple Power Control Modes 11 mA/ch Full Bias Mode7.5 mA/ch Mid Bias Mode4 mA/ch Low Bias Mode0.25 mA/ch Shutdown ModeIADJ Pin for User Controlled Bias CurrentStable Operation Down to 1.8 mA/ch
  • 11 mA/ch Full Bias Mode
  • 7.5 mA/ch Mid Bias Mode
  • 4 mA/ch Low Bias Mode
  • 0.25 mA/ch Shutdown Mode
  • IADJ Pin for User Controlled Bias Current
  • Stable Operation Down to 1.8 mA/ch
  • Low Noise for Increased Receiver Sensitivity 3.2 nV/Hz Inverting Current Noise
  • 3.2 nV/Hz Inverting Current Noise
  • APPLICATIONSIdeal for Full Rate ADSL Applications
  • Ideal for Full Rate ADSL Applications

产品概述

The THS6182 is a current feedback differential line driver ideal for full rate ADSL systems. Its extremely low-power dissipation is ideal for ADSL systems that must achieve high densities in ADSL central office rack applications. The unique architecture of the THS6182 allows the quiescent current to be much lower than existing line drivers while still achieving high linearity without the need for excess open loop gain. Fixed multiple bias settings of the amplifiers allow for enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings, an IADJ pin is available to further lower the bias currents while maintaining stable operation with as little as 1.8 mA per channel. The wide output swing of 44 VPP differentially with ±12-V power supplies allows for more dynamic headroom, keeping distortion at a minimum. With a low 3.2 nV/Hz inverting current noise, the THS6182 increases the sensitivity of the receive signals, allowing for better margins and reach.

THS6182D 数据手册

数据手册 说明 数量 操作
THS6182D

1/0 Driver DSL 16-SOIC

39页,1.75M 查看
THS6182DW

1/0 Driver DSL 20-SOIC

39页,1.75M 查看
THS6182DWP

1/0 Driver DSL 20-SO PowerPad

39页,1.75M 查看

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