更新日期:2024-04-01 00:04:00
产品简介:具有总线保持、TTL 兼容型 CMOS 输入和三态输出的军用 8 通道、2.7V 至 3.6V 反相器
查看详情SNJ54LVTH240J 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
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Texas Instruments
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CDIP20
21+ -
38
-
上海市
-
-
-
一级代理原装
-
TI
-
DIP
/0926 -
3
-
台州
-
-
SNJ54LVTH240J 中文资料属性参数
- 现有数量:0现货1,931Factory
- 价格:在售
- 系列:*
- 包装:管件
- 产品状态:在售
- 逻辑类型:缓冲器,反向
- 元件数:2
- 每个元件位数:4
- 输入类型:-
- 输出类型:三态
- 电流 - 输出高、低:-
- 电压 - 供电:4.5V ~ 5.5V
- 工作温度:-55°C ~ 125°C(TA)
- 安装类型:通孔
- 封装/外壳:20-CDIP(0.300",7.62mm)
- 供应商器件封装:20-CDIP
产品特性
- Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
- Support Unregulated Battery Operation Down to 2.7 V
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Ioff and Power-Up 3-State Support Hot Insertion
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- Latch-Up Performance Exceeds 500 mA Per JESD 17
- ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A)
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
产品概述
These octal buffers and line drivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.These devices are organized as two 4-bit buffer/line drivers with separate output-enable (OE)\ inputs. When OE\ is low, the devices pass data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
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