- 封装:20-SOIC(0.295",7.50mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$0.41472-$1.13
更新日期:2024-04-01 00:04:00
产品简介:具有 TTL 兼容型 CMOS 输入和三态输出的 8 通道、2.7V 至 3.6V 反相器
查看详情- 封装:20-SOIC(0.295",7.50mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$0.41472-$1.13
SN74LVT240ADW 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
SN74LVT240ADW 中文资料属性参数
- 标准包装:25
- 类别:集成电路 (IC)
- 家庭:逻辑 - 栅极和逆变器
- 系列:74LVT
- 逻辑类型:逆变器,缓冲器
- 电路数:2
- 输入数:4
- 特点:三态
- 电源电压:2.7 V ~ 3.6 V
- 电流 - 静态(最大值):5mA
- 输出电流高,低:32mA,64mA
- 逻辑电平 - 低:0.8V
- 逻辑电平 - 高:2V
- 额定电压和最大 CL 时的最大传播延迟:2.6ns @ 3.3V,50pF
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 供应商设备封装:20-SOIC
- 封装/外壳:20-SOIC(0.295",7.50mm 宽)
- 包装:管件
- 其它名称:296-1706296-1706-5
产品特性
- Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
- Supports Unregulated Battery Operation Down to 2.7 V
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Ioff and Power-Up 3-State Support Hot Insertion
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
产品概述
This octal buffer and line driver is designed specifically for low-voltage (3.3-V) VCC operation, but with the
capability to provide a TTL interface to a 5-V system environment.The SN74LVT240A is organized as two 4-bit buffer/line drivers with separate output-enable (OE)\ inputs. When
OE\ is low, the device passes data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the
high-impedance state.When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the device when it is powered down. The
power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
SN74LVT240ADW 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
![]() |
3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
7 Pages页,111K | 查看 |
![]() |
3.3-V ABT OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS |
13 Pages页,111K | 查看 |
![]() |
Buffer, Inverting 2 Element 4 Bit per Element Push-Pull Output 20-SOIC |
17页,1.11M | 查看 |
![]() |
3.3-V ABT OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS |
13 Pages页,310K | 查看 |
![]() |
3.3-V ABT OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS |
13 Pages页,310K | 查看 |
![]() |
Buffer, Inverting 2 Element 4 Bit per Element Push-Pull Output 20-SOIC |
17页,1.11M | 查看 |
![]() |
3.3-V ABT OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS |
13 Pages页,310K | 查看 |
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