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  • 封装:48-BSSOP(0.295",7.50mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:管件
  • 参考价格:$0.63232-$1.73

更新日期:2024-04-01 00:04:00

产品简介:具有总线保持和三态输出的 16 通道、2V 至 3.6V 反相器

查看详情
  • 封装:48-BSSOP(0.295",7.50mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:管件
  • 参考价格:$0.63232-$1.73

SN74LVCH16240ADL 供应商

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  • 型号
  • 品牌
  • 封装/批号
  • 数量
  • 地区
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SN74LVCH16240ADL 中文资料属性参数

  • 标准包装:25
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 栅极和逆变器
  • 系列:74LVCH
  • 逻辑类型:逆变器,缓冲器
  • 电路数:4
  • 输入数:4
  • 特点:三态
  • 电源电压:1.65 V ~ 3.6 V
  • 电流 - 静态(最大值):20µA
  • 输出电流高,低:24mA,24mA
  • 逻辑电平 - 低:0.7 V ~ 0.8 V
  • 逻辑电平 - 高:1.7 V ~ 2 V
  • 额定电压和最大 CL 时的最大传播延迟:4.2ns @ 3.3V,50pF
  • 工作温度:-40°C ~ 85°C
  • 安装类型:表面贴装
  • 供应商设备封装:48-SSOP
  • 封装/外壳:48-BSSOP(0.295",7.50mm 宽)
  • 包装:管件
  • 其它名称:296-8572-5

产品特性

  • Member of the Texas Instruments Widebus™ Family
  • Operates From 1.65 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.2 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce)    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)    >2 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports Partial-Power-Down Mode Operation
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

产品概述

This 16-bit buffer/driver is designed for 1.65-V to 3.6-V VCC operation.The SN74LVCH16240A is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. This device provides inverting outputs and symmetrical active-low output-enable (OE)\ inputs.To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

SN74LVCH16240ADL 数据手册

数据手册 说明 数量 操作
SN74LVCH16240ADL

16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

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SN74LVCH16240ADL

Buffer, Inverting 4 Element 4 Bit per Element Push-Pull Output 48-SSOP

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SN74LVCH16240ADLR

16-Bit Buffer/Driver With 3-State Outputs 48-SSOP -40 to 85

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SN74LVCH16240ADLR

Buffer, Inverting 4 Element 4 Bit per Element Push-Pull Output 48-SSOP

12页,315K 查看

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