- 封装:24-TFSOP(0.173",4.40mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:Digi-Reel®
- 参考价格:$0.5735-$1.34
更新日期:2024-04-01
产品简介:具有三态输出的 10 通道、1.65V 至 3.6V 反相器
查看详情- 封装:24-TFSOP(0.173",4.40mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:Digi-Reel®
- 参考价格:$0.5735-$1.34
SN74LVC828ADGVR 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
SN74LVC828ADGVR 中文资料属性参数
- 标准包装:1
- 类别:集成电路 (IC)
- 家庭:逻辑 - 栅极和逆变器
- 系列:74LVC
- 逻辑类型:逆变器,缓冲器
- 电路数:1
- 输入数:10
- 特点:三态
- 电源电压:1.65 V ~ 3.6 V
- 电流 - 静态(最大值):10µA
- 输出电流高,低:24mA,24mA
- 逻辑电平 - 低:0.7 V ~ 0.8 V
- 逻辑电平 - 高:1.7 V ~ 2 V
- 额定电压和最大 CL 时的最大传播延迟:6.7ns @ 3.3V,50pF
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 供应商设备封装:24-TVSOP
- 封装/外壳:24-TFSOP(0.173",4.40mm 宽)
- 包装:®
- 其它名称:296-12741-6
产品特性
- Operates From 1.65 V to 3.6 V
- Inputs Accept Voltages to 5.5 V
- Max tpd of 6.7 ns at 3.3 V
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
- Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
产品概述
This 10-bit buffer/bus driver is designed for 1.65-V to 3.6-V VCC operation.The SN74LVC828A provides a high-performance bus interface for wide data paths or buses carrying parity.The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2)\ input is high, all ten outputs are in the high-impedance state. The SN74LVC828A provides inverting data at its outputs.Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
SN74LVC828ADGVR 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
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Buffer, Inverting 1 Element 10 Bit per Element Push-Pull Output 24-TVSOP |
16页,617K | 查看 |
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