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  • 封装:8-XFBGA,DSBGA
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:带卷 (TR)
  • 参考价格:$0.187-$0.226

更新日期:2024-04-01 00:04:00

产品简介:具有三态输出的 2 通道、1.65V 至 5.5V 反相器

查看详情
  • 封装:8-XFBGA,DSBGA
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:带卷 (TR)
  • 参考价格:$0.187-$0.226

SN74LVC2G240YZPR 供应商

  • 公司
  • 型号
  • 品牌
  • 封装/批号
  • 数量
  • 地区
  • 日期
  • 说明
  • 询价

SN74LVC2G240YZPR 中文资料属性参数

  • 标准包装:3,000
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 栅极和逆变器
  • 系列:74LVC
  • 逻辑类型:逆变器,缓冲器
  • 电路数:2
  • 输入数:1
  • 特点:三态
  • 电源电压:1.65 V ~ 5.5 V
  • 电流 - 静态(最大值):10µA
  • 输出电流高,低:32mA,32mA
  • 逻辑电平 - 低:0.7 V ~ 0.8 V
  • 逻辑电平 - 高:1.7 V ~ 2 V
  • 额定电压和最大 CL 时的最大传播延迟:4ns @ 5V,50pF
  • 工作温度:-40°C ~ 85°C
  • 安装类型:表面贴装
  • 供应商设备封装:8-DSBGA,8-WCSP(1.9x0.9)
  • 封装/外壳:8-XFBGA,DSBGA
  • 包装:带卷 (TR)
  • 其它名称:296-18807-2

产品特性

  • Available in the Texas Instruments NanoFree Package
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.6 ns at 3.3 V
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Can Be Used as a Down Translator to Translate Inputs From a Max of 5.5 V Down to the VCC Level
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 1000-V Charged-Device Model (C101)
  • 2000-V Human-Body Model (A114-A)
  • 1000-V Charged-Device Model (C101)

产品概述

This dual buffer driver is designed for 1.65-V to 5.5-V VCC operation.The SN74LVC2G240 device is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.This device is organized as two 1-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A input to the Y output. When OE is high, the outputs are in the high-impedance state.To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

SN74LVC2G240YZPR 数据手册

数据手册 说明 数量 操作
SN74LVC2G240YZPR

DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

13 Pages页,331K 查看
SN74LVC2G240YZPR

Buffer, Inverting 2 Element 1 Bit per Element Push-Pull Output 8-DSBGA, 8-WCSP (1.9x0.9)

17页,846K 查看

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