- 封装:20-TSSOP(0.173",4.40mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:带卷 (TR)
- 参考价格:$0.406
更新日期:2024-04-01 00:04:00
产品简介:具有三态输出寄存器的双通道 16 位二进制计数器
查看详情- 封装:20-TSSOP(0.173",4.40mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:带卷 (TR)
- 参考价格:$0.406
SN74LV8154PWR 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI(德州仪器)
-
TSSOP-20
2022+ -
12000
-
上海市
-
-
-
原装可开发票
SN74LV8154PWR 中文资料属性参数
- 标准包装:2,000
- 类别:集成电路 (IC)
- 家庭:逻辑 -计数器,除法器
- 系列:74LV
- 逻辑类型:二进制计数器
- 方向:上
- 元件数:2
- 每个元件的位元数:16
- 复位:-
- 计时:-
- 计数速率:25MHz
- 触发器类型:正边沿
- 电源电压:2 V ~ 5.5 V
- 工作温度:-55°C ~ 125°C
- 安装类型:表面贴装
- 封装/外壳:20-TSSOP(0.173",4.40mm 宽)
- 供应商设备封装:20-TSSOP
- 包装:带卷 (TR)
产品特性
- Can Be Used as Two 16-Bit Counters or a Single 32-Bit Counter
- 8-bit counter read bus
- 2-V to 5.5-V VCC Operation
- Maximum tpd of 25 ns at 5 V (RCLK to Y)
- Typical VOLP (Output Ground Bounce) < 0.7 V at VCC = 5 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) > 4.4 V at VCC = 5 V, TA = 25°C
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 222000-V Human Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)
- 2000-V Human Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
产品概述
The SN74LV8154 device is a dual 16-bit binary counter with 3-state output registers,
designed for 2-V to 5.5-V VCC operation.The counters have dedicated clock inputs. The counters share a clocked storage register
to sample and save the counter contents. Both counters share an asynchronous clear input. The
32-bit storage register can be mapped on the output bus 8-bits at a time. Four bus reads are needed
to access the contents of both stored counts. The two counters can be chained by connecting
CLKBEN to RCOA. All clocks are positive edge
triggered. All other inputs are active low.This device is fully specified for partial-power-down applications using
Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
SN74LV8154PWR 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
![]() |
DUAL 16 BIT BINARY COUNTERS WITH 3 STATE OUTPUT REGISTERS |
11 Pages页,252K | 查看 |
![]() |
Dual 16-Bit Binary Counters with 3-State Output Registers 20-TSSOP -40 to 85 |
12页,267K | 查看 |
![]() |
Dual 16-Bit Binary Counters with 3-State Output Registers 20-TSSOP -40 to 85 |
12页,267K | 查看 |
SN74LV8154PWR 电路图

SN74LV8154PWR 电路图
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