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  • 封装:14-TSSOP(0.173",4.40mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:Digi-Reel®
  • 参考价格:$0.363-$0.91

更新日期:2024-04-01 00:04:00

产品简介:增强型产品、4 通道、2 输入、2V 至 5.5V 与门

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  • 封装:14-TSSOP(0.173",4.40mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:Digi-Reel®
  • 参考价格:$0.363-$0.91

SN74LV08ATPWREP 供应商

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  • 封装/批号
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SN74LV08ATPWREP 中文资料属性参数

  • 标准包装:1
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 栅极和逆变器
  • 系列:74LV
  • 逻辑类型:与门
  • 电路数:4
  • 输入数:2
  • 特点:-
  • 电源电压:2 V ~ 5.5 V
  • 电流 - 静态(最大值):20µA
  • 输出电流高,低:12mA,12mA
  • 逻辑电平 - 低:0.5V
  • 逻辑电平 - 高:1.5V
  • 额定电压和最大 CL 时的最大传播延迟:7.9ns @ 5V,50pF
  • 工作温度:-40°C ~ 105°C
  • 安装类型:表面贴装
  • 供应商设备封装:14-TSSOP
  • 封装/外壳:14-TSSOP(0.173",4.40mm 宽)
  • 包装:®
  • 其它名称:296-22306-6

产品特性

  • Controlled Baseline One Assembly/Test Site, One Fabrication Site
  • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of -55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C
  • Supports Mixed-Mode Voltage Operation on All Ports
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

产品概述

This quadruple 2-input positive-AND gate is designed for 2-V to 5.5-V VCC operation.The SN74LV08A-EP performs the Boolean function Y = A • B or Y = (A\ + B\)\ in positive logic.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

SN74LV08ATPWREP 数据手册

数据手册 说明 数量 操作
SN74LV08ATPWREP

AND Gate IC 4 Channel 14-TSSOP

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