SN74AUP1G34DPWR

更新日期：2024-04-01 00:04:00

产品简介：单路 0.8V 至 3.6V 低功耗缓冲器

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SN74AUP1G34DPWR 供应商

Available in the Ultra Small 0.64 mm2 Package (DPW) with 0.5-mm Pitch
Low Static-Power Consumption; ICC = 0.9 μA Max
Low Dynamic-Power Consumption; Cpd = 4.1 pF Typ at 3.3 V
Low Input Capacitance; Ci = 1.5 pF Typ
Low Noise - Overshoot and Undershoot < 10% of VCC
Ioff Supports Live Insertion, Partial Power Down Mode, and Back Drive Protection
Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the Input (Vhys = 250 mV Typ at 3.3 V)
Wide Operating VCC Range of 0.8 V to 3.6 V
Optimized for 3.3-V Operation
3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
tpd = 4.1 ns Max at 3.3 V
Suitable for Point-to-Point Applications
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22 2000-V Human-Body Model (A114-B, Class II) 1000-V Charged-Device Model (C101)
2000-V Human-Body Model (A114-B, Class II)
1000-V Charged-Device Model (C101)

This single buffer gate performs the Boolean function Y = A in positive logic.

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数据手册	说明	数量	操作
SN74AUP1G34DPWR	Buffer, Non-Inverting 1 Element 1 Bit per Element Push-Pull Output 4-X2SON (0.80x0.80)	37页,1.87M	查看

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