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  • 封装:48-TFSOP(0.240",6.10mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:Digi-Reel®
  • 参考价格:$1.2665-$2.71

更新日期:2024-04-01 00:04:00

产品简介:具有三态输出的 16 通道、0.8V 至 2.7V 高速反相器

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  • 封装:48-TFSOP(0.240",6.10mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:Digi-Reel®
  • 参考价格:$1.2665-$2.71

SN74AUC16240DGGR 供应商

  • 公司
  • 型号
  • 品牌
  • 封装/批号
  • 数量
  • 地区
  • 日期
  • 说明
  • 询价

SN74AUC16240DGGR 中文资料属性参数

  • 标准包装:1
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 栅极和逆变器
  • 系列:74AUC
  • 逻辑类型:逆变器,缓冲器
  • 电路数:4
  • 输入数:4
  • 特点:三态
  • 电源电压:0.8 V ~ 2.7 V
  • 电流 - 静态(最大值):20µA
  • 输出电流高,低:9mA,9mA
  • 逻辑电平 - 低:0 V ~ 0.7 V
  • 逻辑电平 - 高:1.7V
  • 额定电压和最大 CL 时的最大传播延迟:1.6ns @ 2.5V,30pF
  • 工作温度:-40°C ~ 85°C
  • 安装类型:表面贴装
  • 供应商设备封装:48-TSSOP
  • 封装/外壳:48-TFSOP(0.240",6.10mm 宽)
  • 包装:®
  • 其它名称:296-15408-6

产品特性

  • Member of the Texas Instruments Widebus™ Family
  • Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • Ioff Supports Partial-Power-Down Mode Operation
  • Sub 1-V Operable
  • Max tpd of 2 ns at 1.8 V
  • Low Power Consumption, 20-uA Max ICC
  • ±8-mA Output Drive at 1.8 V
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

产品概述

This 16-bit buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.The SN74AUC16240 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides inverting outputs and symmetrical active-low output-enable (OE)\ inputs.To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

SN74AUC16240DGGR 数据手册

数据手册 说明 数量 操作
SN74AUC16240DGGR

16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

6 Pages页,308K 查看
SN74AUC16240DGGR

Buffer, Inverting 4 Element 4 Bit per Element Push-Pull Output 48-TSSOP

13页,499K 查看

IC 索引: A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 0 1 2 3 4 5 6 7 8 9