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  • 封装:8-WFDFN 裸露焊盘
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:Digi-Reel®
  • 参考价格:$4.642-$6.34

更新日期:2024-04-01

产品简介:具有使能端的 2.5V/3.3V 振荡器增益级/缓冲器

查看详情
  • 封装:8-WFDFN 裸露焊盘
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:Digi-Reel®
  • 参考价格:$4.642-$6.34

SN65LVDS17DRFT 供应商

  • 公司
  • 型号
  • 品牌
  • 封装/批号
  • 数量
  • 地区
  • 日期
  • 说明
  • 询价

SN65LVDS17DRFT 中文资料属性参数

  • 标准包装:1
  • 类别:集成电路 (IC)
  • 家庭:接口 - 信号缓冲器,中继器,分配器
  • 系列:65LVDS
  • 类型:缓冲器
  • Tx/Rx类型:LVDS
  • 延迟时间:460ps
  • 电容 - 输入:-
  • 电源电压:2.375 V ~ 3.6 V
  • 电流 - 电源:48mA
  • 安装类型:表面贴装
  • 封装/外壳:8-WFDFN 裸露焊盘
  • 供应商设备封装:8-WSON 裸露焊盘(2x2)
  • 包装:®
  • 配用:296-21005-ND - EVALUATION MODULE FOR SN65LVDS17
  • 其它名称:296-17442-6

产品特性

  • Low-Voltage PECL Input and Low-Voltage PECL or LVDS Outputs
  • Clock Rates to 2 GHz 140-ps Output Transition Times 0.11 ps Typical Intrinsic Phase Jitter Less than 630 ps Propagation Delay Times
  • 140-ps Output Transition Times
  • 0.11 ps Typical Intrinsic Phase Jitter
  • Less than 630 ps Propagation Delay Times
  • 2.5-V or 3.3-V Supply Operation
  • 2-mm × 2-mm Small-Outline No-Lead Package
  • APPLICATIONS PECL-to-LVDS Translation Clock Signal Amplification
  • PECL-to-LVDS Translation
  • Clock Signal Amplification

产品概述

These four devices are high-frequency oscillator gain stages supporting both LVPECL or LVDS on the high gain outputs in 3.3-V or 2.5-V systems. Additionally, provides the option of both single-ended input (PECL levels on the SN65LVx16) and fully differential inputs on the SN65LVx17.The SN65LVx16 provides the user a Gain Control (GC) for controlling the Q output from 300 mV to 860 mV either by leaving it open (NC), grounded, or tied to VCC. (When left open, the Q output defaults to 575 mV.) The Q on the SN65LVx17 defaults to 575 mV as well.Both devices provide a voltage reference (VBB) of typically 1.35 V below VCC for use in receiving single-ended PECL input signals. When not used, VBB should be unconnected or open.All devices are characterized for operation from -40°C to 85°C.

SN65LVDS17DRFT 数据手册

数据手册 说明 数量 操作
SN65LVDS17DRFT

2.5-V/3.3-V OSCILLATOR GAIN STAGE/BUFFERS

15 Pages页,313K 查看
SN65LVDS17DRFT

Buffer, ReDriver 1 Channel 4Gbps 8-WSON (2x2)

18页,854K 查看
SN65LVDS17DRFTG4

2.5-V/3.3-V OSCILLATOR GAIN STAGE/BUFFERS

15 Pages页,320K 查看

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